탄소나노튜브를 구비한 트랜지스터의 도핑방법 및 도핑이온의 위치 제어방법 및 트랜지스터
    13.
    发明公开
    탄소나노튜브를 구비한 트랜지스터의 도핑방법 및 도핑이온의 위치 제어방법 및 트랜지스터 有权
    包含碳纳米管的放电晶体管的方法和使用该方法控制放电离子和晶体管的位置的方法

    公开(公告)号:KR1020090108459A

    公开(公告)日:2009-10-15

    申请号:KR1020080033882

    申请日:2008-04-11

    Abstract: PURPOSE: A doping method of a transistor comprising carbon nano tube is provided to easily manufacture a p-type transistor and an n-type transistor according to needs. CONSTITUTION: A field effect transistor(200) includes a source, a drain, a carbon nano tube, and a gate. The carbon nano tube is a channel of the source and the drain. A first voltage is applied to the gate. An ion is absorbed on a surface of the carbon nano tube(20). In the absorbing step, nitronium hexafluoro antimonate solution is contacted on the surface of the carbon nano tube. The solution which is not absorbed on the surface of the carbon nano tube is removed. The ion is absorbed on the surface of the carbon nano tube by drying the substrate.

    Abstract translation: 目的:提供一种包含碳纳米管的晶体管的掺杂方法,以便根据需要容易制造p型晶体管和n型晶体管。 构成:场效应晶体管(200)包括源极,漏极,碳纳米管和栅极。 碳纳米管是源极和漏极的通道。 第一电压施加到栅极。 在碳纳米管(20)的表面上吸收离子。 在吸收步骤中,六氟铱硝酸铌溶液在碳纳米管的表面上接触。 去除不被碳纳米管表面吸收的溶液。 通过干燥基底将离子吸收在碳纳米管的表面上。

    탄소나노튜브 박막을 이용한 에스램
    16.
    发明公开
    탄소나노튜브 박막을 이용한 에스램 无效
    使用碳纳米薄膜的静态随机存取存储器

    公开(公告)号:KR1020100094192A

    公开(公告)日:2010-08-26

    申请号:KR1020090013504

    申请日:2009-02-18

    Abstract: PURPOSE: A static random access memory(SRAM) using a carbon nanotube thin film is provided to maintain the characteristic uniformity of an SRAM by including a transistor in which channels are composed of carbon nanotube thin films. CONSTITUTION: A first SRAM includes a first transistor to a sixth transistor(Q1 to Q6). The first transistor and the second transistor form a first inverter(40). The third transistor and the forth transistor form a second inverter(42). The first inverter and the second inverter form a flip-flop circuit. The gate of the fifth transistor is connected with a word-line(W). One end of the sixth transistor is connected with a second bit-line(B2).

    Abstract translation: 目的:提供使用碳纳米管薄膜的静态随机存取存储器(SRAM),以通过包括其中通道由碳纳米管薄膜组成的晶体管来保持SRAM的特性均匀性。 构成:第一SRAM包括第一晶体管至第六晶体管(Q1至Q6)。 第一晶体管和第二晶体管形成第一反相器(40)。 第三晶体管和第四晶体管形成第二反相器(42)。 第一反相器和第二反相器形成触发器电路。 第五晶体管的栅极与字线(W)连接。 第六晶体管的一端与第二位线(B2)连接。

    지향성 광 추출 장치 및 이를 포함한 광 인터커넥션 시스템
    19.
    发明公开
    지향성 광 추출 장치 및 이를 포함한 광 인터커넥션 시스템 审中-实审
    输出方向光和互连系统的装置

    公开(公告)号:KR1020150050093A

    公开(公告)日:2015-05-08

    申请号:KR1020130131503

    申请日:2013-10-31

    Abstract: 지향성광 추출장치및 이를포함한광 인터커넥션시스템이개시된다. 개시된지향성광 추출장치는, 광을방출하는발광구조물과, 상기발광구조물상에구비된것으로, 상기광을공진시키는광 공급부및 상기광 공급부로부터나온광이지향성을갖도록반사시키는광 반사부를포함하는광학안테나층을포함하고, 상기광 공급부는상기광학안테나층을관통하는슬롯형상을가진다.

    Abstract translation: 公开了一种定向光提取装置和包括该定向光提取装置的光互连系统。 所公开的定向光提取装置包括发光的发光结构; 包括在所述发光结构中并且使所述光的共振的光供给单元; 以及光天线层,其包括反射从所述光供给单元发射的光以具有所述光的方向性的光反射单元。 光供给单元具有穿过光天线层的槽形状。

    반도체 소자의 제조에서 전하축적 방지방법
    20.
    发明公开
    반도체 소자의 제조에서 전하축적 방지방법 审中-实审
    防止半导体器件制造中的电荷累积的方法

    公开(公告)号:KR1020140025158A

    公开(公告)日:2014-03-04

    申请号:KR1020120091469

    申请日:2012-08-21

    Abstract: Disclosed is a method for preventing charge accumulation in a semiconductor device manufacturing process. According to one embodiment of the present invention, the method for preventing charge accumulation includes the steps of: forming a material layer on a substrate and patterning (processing) the material layer; and forming a graphene layer on the upper part or the lower part of the material layer before the material layer is patterned. The substrate can be an insulating substrate. Also, the substrate can be a laminate with a multi-layered structure.

    Abstract translation: 公开了一种在半导体器件制造工艺中防止电荷累积的方法。 根据本发明的一个实施例,用于防止电荷累积的方法包括以下步骤:在衬底上形成材料层并构图(加工)材料层; 以及在材料层被图案化之前在材料层的上部或下部形成石墨烯层。 衬底可以是绝缘衬底。 此外,基板可以是具有多层结构的层叠体。

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