11.
    发明专利
    未知

    公开(公告)号:SE0004377D0

    公开(公告)日:2000-11-29

    申请号:SE0004377

    申请日:2000-11-29

    Abstract: A semiconductor device of planar structure has a pn-junction (10) formed by a first layer (1) doped according to a first conductivity type, n or p, and on top thereof a second layer (2) doped according to a second conductivity type. The second layer has a higher doping concentration than the first layer and a lateral edge thereof is provided with an edge termination with second zones of said second conductivity type separated by first zones (4) of said first conductivity type arranged so that the total charge and/or the effective sheet charge density of dopants according to said second conductivity type is decreasing towards the laterally outer border (8) of the edge termination. A third layer (5) doped according to said first conductivity type is arranged on top of said second layer at least in the region of the edge termination for burying the edge termination of the device thereunder.

    12.
    发明专利
    未知

    公开(公告)号:SE9601172D0

    公开(公告)日:1996-03-27

    申请号:SE9601172

    申请日:1996-03-27

    Abstract: An insulated gate bipolar transistor comprises a drain which supports a highly doped p-type substrate layer; a low doped n-type drift layer supported over the substrate layer; a base layer supported over the drift layer including a trench extending into the base layer, and supporting an insulated gate on an upper surface thereof separated from the trench by a highly doped n-type source region, the trench having a highly doped p-type layer at the bottom thereof vertically separated from the source region; and a source layer disposed over the n-type source region and extending into the trench covering the highly doped p-type layer in the trench bottom, wherein an applied voltage to the gate forms a conducting inversion channel in the base layer for electron transport from the source region to the drain, and the highly doped p-type layer in the bottom of the trench collects holes injected from the substrate layer into the drift layer thereby improving latch up immunity for the transistor.

    19.
    发明专利
    未知

    公开(公告)号:SE9800286D0

    公开(公告)日:1998-02-02

    申请号:SE9800286

    申请日:1998-02-02

    Abstract: A transistor of SiC for high voltage and high switching frequency applications is a MISFET or an IGBT. This transistor comprises a plurality of laterally spaced active regions. The center to center distance of two adjacent active regions defines a lateral width of a cell of the transistor. The relation of the lateral width of an accumulation region defined as the region in the drift layer connecting to a gate-insulating layer in each individual cell and the lateral cell width is selected so as to keep the power losses in the transistor as a consequence of switching below a determined proportion to the power losses relating to conduction of the transistor for a predetermined switching frequency and on-state voltage for which the transistor is designed.

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