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公开(公告)号：WO2006063060A3
公开(公告)日：2006-11-16
申请号：PCT/US2005044281
申请日：2005-12-08
Applicant: IBM , CHIDAMBARRAO DURESETI , LI YING , MALIK RAJEEV , NARASIMHA SHREESH , YANG HAINING , ZHU HUILONG
Inventor： CHIDAMBARRAO DURESETI , LI YING , MALIK RAJEEV , NARASIMHA SHREESH , YANG HAINING , ZHU HUILONG
CPC classification number: H01L29/7843 , H01L21/823807 , H01L29/66772 , Y10S438/938
Abstract: The present invention provides a semiconductor device having dual nitride liners, which provide an increased transverse stress state for at least one FET (300) and methods for the manufacture of such a device. A first aspect of the invention provides a method for use in the manufacture of a semiconductor device comprising the steps of applying a first silicon nitride liner (360) to the device and applying a second silicon nitride liner (370) adjacent the fast silicon nitride liner, wherein at least one of the first and second silicon nitride liners induces a transverse stress in a silicon channel (330) beneath at least one of the first and second silicon nitride liner.
Abstract translation: 本发明提供一种具有双重氮化物衬垫的半导体器件，其为至少一个FET（300）提供增加的横向应力状态以及用于制造这种器件的方法。 本发明的第一方面提供了一种用于制造半导体器件的方法，包括以下步骤：将第一氮化硅衬垫（360）施加到器件上，并施加与快速氮化硅衬垫相邻的第二氮化硅衬垫（370） ，其中所述第一和第二氮化硅衬垫中的至少一个在所述第一和第二氮化硅衬垫中的至少一个下方的硅沟道（330）中引起横向应力。
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公开(公告)号：WO2012106056A3
公开(公告)日：2012-10-18
申请号：PCT/US2012020020
申请日：2012-01-03
Applicant: IBM , RAMACHANDRAN RAVIKUMAR , DIVAKARUNI RAMACHANDRA , LI YING
Inventor： RAMACHANDRAN RAVIKUMAR , DIVAKARUNI RAMACHANDRA , LI YING
IPC: H01L29/78 , H01L21/28 , H01L21/336
CPC classification number: H01L29/401 , H01L21/76895 , H01L21/76897 , H01L29/49 , H01L29/4983 , H01L29/51 , H01L29/66545 , H01L29/6656
Abstract: A semiconductor structure is provided that includes a semiconductor substrate 12 having a plurality of gate stacks 14' located on a surface of the semiconductor substrate. Each gate stack includes, from bottom to top, a high k gate dielectric layer 42, a work function metal layer 44 and a conductive metal 46. A spacer 22 is located on sidewalls of each gate stack and a self- aligned dielectric liner 30 is present on an upper surface of each spacer. A bottom surface of each self-aligned dielectric liner 30 is present on an upper surface of a semiconductor metal alloy 28. A contact metal 34 is located between neighboring gate stacks and is separated from each gate stack by the self-aligned dielectric liner 30. The structure also includes another contact metal 60 having a portion that is located on and in direct contact with an upper surface of the contact metal and another portion that is located on and in direct contact with the conductive metal of one of the gate stacks. Methods of forming the semiconductor structure using a replacement gate and a non-replacement gate scheme are also disclosed.
Abstract translation: 提供半导体结构，其包括具有位于半导体衬底的表面上的多个栅极叠层14'的半导体衬底12。 每个栅极堆叠从底部到顶部包括高k栅极电介质层42，功函数金属层44和导电金属46.间隔物22位于每个栅极堆叠的侧壁上，并且自对准电介质衬垫30是 存在于每个间隔件的上表面上。 每个自对准电介质衬垫30的底表面存在于半导体金属合金28的上表面上。接触金属34位于相邻的栅极叠层之间并且通过自对准电介质衬垫30与每个栅极叠层分开。 该结构还包括另一接触金属60，其具有位于接触金属的上表面上并与其直接接触的部分以及位于栅叠层中的一个的导电金属上并与其直接接触的另一部分。 还公开了使用替代栅极和非替代栅极方案形成半导体结构的方法。
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13.发明申请METHOD OF PRODUCING HIGHLY STRAINED PECVD SILICON NITRIDE THIN FILMS AT LOW TEMPERATURE 审中-公开在低温下生产高应变PECVD硅氮化物薄膜的方法
公开(公告)号：WO2006107669A3
公开(公告)日：2009-04-09
申请号：PCT/US2006011391
申请日：2006-03-29
Applicant: IBM , BELYANSKY MICHAEL P , GLUSCHENKOV OLEG , LI YING , MALLIKARJUNAN ANUPAMA
Inventor： BELYANSKY MICHAEL P , GLUSCHENKOV OLEG , LI YING , MALLIKARJUNAN ANUPAMA
IPC: H01L21/26
CPC classification number: H01L21/3185 , C23C16/345 , C23C16/45523 , H01L21/823807 , H01L21/823864 , H01L29/7833 , H01L29/7843
Abstract: A method for increasing the level of stress for amorphous thin film stressors by means of modifying the internal structure of such stressors is provided. The method includes first forming a first portion of an amorphous film stressor material (14) on at least a surface of a substrate (12), said first portion (18) having a first state of mechanical strain defining a first stress value. After the forming step, the first portion of the amorphous film stressor material is densified (20) such that the first state of mechanical strain is not substantiaUydtered,\vhile increasing the first stress value. In some embodiments, the steps of forming and densifying are repeated any number of times (20, 2OA, 20B) to obtain a preselected and desired thickness for the stressor.
Abstract translation: 提供了一种通过改变这种压力源的内部结构来提高非晶薄膜应力的应力水平的方法。 该方法包括首先在衬底（12）的至少一个表面上形成非晶膜应力材料（14）的第一部分，所述第一部分（18）具有限定第一应力值的第一机械应变状态。 在成形步骤之后，无定形薄膜应力材料的第一部分被致密化（20），使得机械应变的第一状态没有被证实，即增加第一应力值。 在一些实施例中，形成和致密化的步骤重复任意次数（20,20A，20B），以获得应力源的预选和期望的厚度。
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公开(公告)号：WO2005083780A2
公开(公告)日：2005-09-09
申请号：PCT/US2005005565
申请日：2005-02-22
Applicant: IBM , AMOS RICKY S , BOYD DIANE C , CABRAL CYRIL JR , KAPLAN RICHARD D , KEDZIERSKI JAKUB T , KU VICTOR , LEE WOO-HYEONG , LI YING , MOCUTA ANDA C , NARAYANAN VIJAY , STEEGEN AN L , SURENDRA MAHESWAREN
Inventor： AMOS RICKY S , BOYD DIANE C , CABRAL CYRIL JR , KAPLAN RICHARD D , KEDZIERSKI JAKUB T , KU VICTOR , LEE WOO-HYEONG , LI YING , MOCUTA ANDA C , NARAYANAN VIJAY , STEEGEN AN L , SURENDRA MAHESWAREN
IPC: H01L21/28 , H01L21/336 , H01L21/339 , H01L21/60 , H01L21/8238 , H01L27/092
CPC classification number: H01L21/76897 , H01L21/28052 , H01L21/28097 , H01L21/823835 , H01L29/66545 , H01L29/6656
Abstract: The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.
Abstract translation: 本发明提供了互补金属氧化物半导体集成工艺，由此在栅极电介质顶上制造多个硅化金属栅极。 不管硅化物金属栅极的尺寸如何，使用本发明的集成方案形成的每个硅化金属栅极具有相同的硅化物金属相和基本相同的高度。 本发明还提供了形成具有硅化触点的CMOS结构的各种方法，其中多晶硅栅极高度在半导体结构的整个表面上基本相同。
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公开(公告)号：DE102013216892A1
公开(公告)日：2014-03-13
申请号：DE102013216892
申请日：2013-08-26
Applicant: IBM
Inventor： HAAS NORMAN , LI YING , OTTO CHARLES A , PANKANTI SHARATHCHANDRA , FUJIJI YUICHI , TRINH HOANG
IPC: B61L23/04
Abstract: Eine globale Position eines observierten Objektes wird durch Beziehen einer ersten globalen Position eines observierten Objektes mit wenigstens einer Positionsbestimmungseinheit ermittelt. Es wird ein Ermitteln dahingehend durchgeführt, ob ein Satz an gespeicherten visuellen Eigenschaftsdaten wenigstens eines Wegepunktes mit einem Satz an visuellen Eigenschaftsdaten übereinstimmt, der anhand von wenigstens einem erfassten Bild bezogen wurde, das eine zu dem observierten Objekten gehörende Szene aufweist. In Reaktion auf den Satz an gespeicherten visuellen Eigenschaftsdaten, der mit dem Satz an bezogenen visuellen Eigenschaftsdaten übereinstimmt, wird eine zweite globale Position des observierten Objektes auf der Grundlage eines Satzes an gespeicherten Standortdaten ermittelt, der zu dem wenigstens einen Wegepunkt und der ersten globalen Position gehört.
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Patent Agency Ranking
公开(公告)号：GB2496009A
公开(公告)日：2013-05-01
申请号：GB201213099
申请日：2012-07-24
Applicant: IBM
Inventor： LI YING , PALURI BALAMANOHAR , OTTO CHARLES , PANKANTI SHARATHCHANDRA UMAPATHIRAO , FUJIKI YUICHI , HAAS NORMAN
IPC: G06T7/00
Abstract: A system, method, and computer program product are described for detecting anomalies in an image. In an example embodiment the method includes partitioning 304 each image of a set of images into a plurality of image local units. The method further includes clustering 308 all local units in the image set into clusters, and consequently assigning 310 a class label to each local unit based on the clustering results, wherein the local units with identical class labels have at least one substantially related image feature. Further, the method includes assigning 312 a weight to each of the local units based on a variation of the class labels across all images in a set of images. The method further includes performing a clustering over all images in the set, for example by using a distance metric that takes the learned weight of each local unit into account, then determining the images that belong to minorities of the clusters as anomalous.
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17.发明专利
公开(公告)号：DE112019000334T5
公开(公告)日：2020-09-17
申请号：DE112019000334
申请日：2019-03-11
Applicant: IBM
Inventor： LI YING , GANDASASMITA HARUMMIATI , DORAI CHITRA
Abstract: Ein Verfahren zum Validieren der Identität eines fernen Benutzers weist auf: Abrufen eines Fotos des Benutzers und einer Unterschrift des Benutzers auf einem digitalen Ausweis; Anfordern eines in Echtzeit aufgenommenen Satzes Fotos, wobei der in Echtzeit aufgenommene Satz Fotos ein erstes Foto und ein zweites Foto enthält; Anfordern einer in Echtzeit geleisteten Unterschrift zusammen mit dem angeforderten, in Echtzeit aufgenommenen Satz Fotos; Unterschriftenvergleich zwischen der in Echtzeit geleisteten Unterschrift mit der Unterschrift des Benutzers auf dem digitalen Ausweis; Hintergrundvergleich zwischen dem Hintergrund auf dem ersten Foto des in Echtzeit aufgenommenen Satzes Fotos mit einem Hintergrund auf dem zweiten Foto des in Echtzeit aufgenommenen Satzes Fotos; Benutzervergleich zwischen einem Bild des Benutzers auf dem ersten Foto mit dem Foto des Benutzers auf dem digitalen Ausweis; und Validieren der Identität des Benutzers als Reaktion auf die Feststellung, dass beim Unterschriftenvergleich ein erster Schwellenwert erreicht wird, dass beim Hintergrundvergleich ein zweiter Schwellenwert erreicht wird und dass beim Benutzervergleich ein dritter Schwellenwert erreicht wird.
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公开(公告)号：GB2496009B
公开(公告)日：2015-03-04
申请号：GB201213099
申请日：2012-07-24
Applicant: IBM
Inventor： LI YING , PALURI BALAMANOHAR , OTTO CHARLES , PANKANTI SHARATHCHANDRA UMAPATHIRAO , FUJIKI YUICHI , HAAS NORMAN
Abstract: A system, method, and computer program product for detecting anomalies in an image. In an example embodiment the method includes partitioning each image of a set of images into a plurality of image local units. The method further includes clustering all local units in the image set into clusters, and consequently assigning a class label to each local unit based on the clustering results. The local units with identical class labels having at least one substantially related image feature. Further, the method includes assigning a weight to each of the local units based on a variation of the class labels across all images in a set of images. The method further includes performing a clustering over all images in the set by using a distance metric that takes the learned weight of each local unit into account, then determining the images that belong to minorities of the clusters as anomalies.
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公开(公告)号：GB2486601B
公开(公告)日：2013-10-30
申请号：GB201203113
申请日：2010-08-25
Applicant: IBM
Inventor： LI YING , NARASIMHA SHREESH , RAUSCH WERNER A
IPC: H01L29/66 , H01L21/336 , H01L21/84 , H01L27/12 , H01L29/78
Abstract: Disclosed is an SOI device on a bulk silicon layer which has an FET region, a body contact region and an STI region. The FET region is made of an SOI layer and an overlying gate. The STI region includes a first STI layer separating the SOI device from an adjacent SOI device. The body contact region includes an extension of the SOI layer, a second STI layer on the extension and a body contact in contact with the extension. The first and second STI layers are contiguous and of different thicknesses so as to form a split level STI.
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