公开(公告)号：CA2483197C

公开(公告)日：2010-07-13

申请号：CA2483197

申请日：2003-04-01

Applicant: IBM

Inventor： BEUKEMA BRUCE LEROY ,  GREGG THOMAS ANTHONY ,  NEAL DANNY MARVIN ,  RECIO RENATO JOHN

IPC: G06F9/54 ,  G06F13/42 ,  G06F13/12 ,  G06F13/40 ,  G06F15/17 ,  H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08

Abstract: A method, system, and product in a data processing system for managing data transmitted from a first end node to a second end node included in the data processing system. A logical connection is established between the first end node and the second end node prior to transmitting data between the end nodes. An instance number is associated with the logical connection and included in each packet transmitted between end nodes while this connection remains. The number remains constant during this connection, but is altered, such as by incrementing it, each time a logical connection between these end nodes is reestablished. Each packet is associated with a particular instance of the logical connection and when it is received, the number may be used to determine whether the packet is a stale packet transmitted during a previous logical connection between these end nodes.

公开(公告)号：AU2003214470A1

公开(公告)日：2003-11-10

申请号：AU2003214470

申请日：2003-04-01

Applicant: IBM

Inventor： GREGG THOMAS ANTHONY ,  NEAL DANNY MARVIN ,  RECIO RENATO JOHN ,  BEUKEMA BRUCE LEROY

IPC: G06F9/54 ,  H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08 ,  G06F13/42 ,  G06F13/40

Abstract: A method, system, and product in a data processing system are disclosed for managing data transmitted from a first end node to a second end node included in the data processing system. A logical connection is established between the first end node and the second end node prior to transmitting data between the end nodes. An instance number is associated with this particular logical connection. The instance number is included in each packet transmitted between the end nodes while this logical connection remains established. The instance number remains constant during this logical connection. The instance number is altered, such as by incrementing it, each time a logical connection between these end nodes is reestablished. Thus, each packet is associated with a particular instance of the logical connection. When a packet is received, the instance number included in the packet may be used to determine whether the packet is a stale packet transmitted during a previous logical connection between these end nodes.

公开(公告)号：CA2483197A1

公开(公告)日：2003-11-06

申请号：CA2483197

申请日：2003-04-01

Applicant: IBM

Inventor： RECIO RENATO JOHN ,  GREGG THOMAS ANTHONY ,  NEAL DANNY MARVIN ,  BEUKEMA BRUCE LEROY

IPC: G06F9/54 ,  H04L12/28 ,  H04L12/56 ,  H04L29/06 ,  H04L29/08 ,  G06F13/42 ,  G06F13/12 ,  G06F15/17 ,  G06F13/40

Abstract: A method, system, and product in a data processing system for managing data transmitted from a first end node to a second end node included in the data processing system. A logical connection is established between the first end node and the second end node prior to transmitting data between the end node s. An instance number is associated with the logical connection and included in each packet transmitted between end nodes while this connection remains. The number remains constant during this connection, but is altered, such as by incrementing it, each time a logical connection between these end nodes is reestablished. Each packet is associated with a particular instance of the logical connection and when it is received, the number may be used to determine whether the packet is a stale packet transmitted during a previous logical connection between these end nodes.

公开(公告)号：DE19953383A1

公开(公告)日：2000-06-21

申请号：DE19953383

申请日：1999-11-06

Applicant: IBM

Inventor： CLOUSER PAUL LEE ,  KELLEY RICHARD ALLEN ,  NEAL DANNY MARVIN

IPC: G06F3/14 ,  G09G5/36 ,  G09G5/395

Abstract: Two pairs of differential signal lines provided for each graphic port signal are routed close to each other on mother board selected from a group consisting of system chip set and graphic chip. The performance of the graphic port is enhanced, utilizing differential signaling between each of the signal line. - DETAILED DESCRIPTION - INDEPENDENT CLAIMS are also included for the following: - (a) Accelerated graphic port performance enhancing apparatus; - (b) Enhanced accelerated graphic port

公开(公告)号：DE19782087T1

公开(公告)日：1999-11-25

申请号：DE19782087

申请日：1997-09-30

Applicant: IBM

Inventor： GUTHRIE GUY LYNN ,  NEAL DANNY MARVIN ,  KELLEY RICHARD ALLEN

IPC: G06F13/40

Abstract: A method and system for providing the ability to add or remove components of a data processing system without powering the system down ("Hot-plug"). The system includes an arbiter, residing within a Host Bridge, Control & Power logic, and a plurality of in-line switch modules coupled to a bus. Each of the in-line switch modules provide isolation for load(s) connected thereto. The Host Bridge in combination with the Control & Power Logic implement the Hot-plug operations such as ramping up and down of the power to a selected slot, and activating the appropriate in-line switches for communication from/to a load (target/controlling master).

公开(公告)号：CH647197A5

公开(公告)日：1985-01-15

申请号：CH351679

申请日：1979-04-12

Applicant: IBM

Inventor： CLANCY DOUGLAS EUGENE ,  JOHNSON CARL FOSTER ,  MCCRAY WILLIAM ROY ,  NEAL DANNY MARVIN

IPC: B41J29/50 ,  B41J21/00 ,  B41J21/17 ,  G06F17/21 ,  G06F17/24 ,  G06K15/00 ,  B41J19/60

公开(公告)号：CH636806A5

公开(公告)日：1983-06-30

申请号：CH286579

申请日：1979-03-28

Applicant: IBM

Inventor： BOWLES DAVID JOHN ,  CLANCY DOUGLAS EUGENE ,  JOHNSON CARL FOSTER ,  NEAL DANNY MARVIN

IPC: B41J21/00 ,  B41J29/36 ,  G06K15/08 ,  H04L17/16

公开(公告)号：AU4592779A

公开(公告)日：1979-11-29

申请号：AU4592779

申请日：1979-04-11

Applicant: IBM

Inventor： CLANCY DOUGLAS EUGENE ,  JOHNSON CARL FOSTER ,  MCCRAY WILLIAM ROY ,  NEAL DANNY MARVIN

IPC: B41J29/50 ,  B41J21/00 ,  B41J21/17 ,  G06F17/21 ,  G06F17/24 ,  G06K15/00 ,  B41J21/08 ,  B41J23/38

公开(公告)号：DE19782087B4

公开(公告)日：2010-05-20

申请号：DE19782087

申请日：1997-09-30

Applicant: IBM

Inventor： GUTHRIE GUY LYNN ,  NEAL DANNY MARVIN ,  KELLEY RICHARD ALLEN

IPC: G06F13/40

Abstract: A method and system for providing the ability to add or remove components of a data processing system without powering the system down ("Hot-plug"). The system includes an arbiter, residing within a Host Bridge, Control & Power logic, and a plurality of in-line switch modules coupled to a bus. Each of the in-line switch modules provide isolation for load(s) connected thereto. The Host Bridge in combination with the Control & Power Logic implement the Hot-plug operations such as ramping up and down of the power to a selected slot, and activating the appropriate in-line switches for communication from/to a load (target/controlling master).

公开(公告)号：DE69736872D1

公开(公告)日：2006-12-14

申请号：DE69736872

申请日：1997-03-20

Applicant: IBM

Inventor： GUTHRIE GUY LYNN ,  KELLEY RICHARD ALLEN ,  NEAL DANNY MARVIN ,  THURBER STEVE MARK

IPC: G06F13/40 ,  G06F13/36

Abstract: A data processing system 10 includes a processor 12, system memory 15 and a number of peripheral devices 401, 403, and one or more bridges 400 which may connect between the processor, memory and peripheral devices and other hosts or peripheral devices such as in a network. A bridge, such as a PCI host bridge, connects between a primary bus (e.g system bus) 14 and a secondary bus 16. The host bridge 400 provides a dual host bridge function which creates two secondary bus interfaces. This allows increased loading capability under one dual host bridge compared to a lesser number of slots allowed under one normal host bridge. Also included is additional control logic for providing arbitration control and for steering transactions to the appropriate bus interface. Additionally, peer to peer support across the two secondary bus interfaces is provided.