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公开(公告)号：AT57034T
公开(公告)日：1990-10-15
申请号：AT84107798
申请日：1984-07-05
Applicant: IBM
Inventor： KUMMER DAVID ALLEN , RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES
Abstract: @ A raster scan display system includes a plurality of storage maps (MAPO to MAP4). These maps are addressable in either of two modes. In the first mode each map contains bit mapped data and the maps are addressed together to provide colour signals from which colour video signals are derived. In the second mode, one map contains character representing data and a further map, character display dot patterns. In this mode the first map is addressed to provide partial addresses for the further map. These partial addresses are combined with row scan data signals to access the further map from which the character display dot data is used to generate the video signals.
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公开(公告)号：DE3480965D1
公开(公告)日：1990-02-08
申请号：DE3480965
申请日：1984-07-05
Applicant: IBM
Inventor： KUMMER DAVID ALLEN , SAENZ JESUS ANDRES , TRYNOSKY STEPHEN WAYNE
IPC: G09G5/00 , G06F3/00 , G06F3/14 , G06F7/02 , G06T7/00 , G09G1/16 , G09G5/02 , G09G5/393 , G09G5/395 , G06F15/70
Abstract: In a bit mapped raster scan digital display system, a number of maps (MAPO-MAP3), each contain a single component of the display data and are read together to provide sets of bytes, each set representing eight pel defining groups. A compare system is provided for determining when a pel group in a set of bytes compares with a reference pel defining group. For the, or each, pair of maps, the compare system compares each bit of the two bytes of data with the correspondingly positioned bit of the reference group to provide outputs when a corresponding bit in each of the bytes compares with the two reference bits. When more than two maps are employed the compare outputs related to all of the pairs of maps are combined to provide an output signal when a pel group in a byte from the maps compares with the reference bits. In a modification of the system, the comparison can be made between one or more of the maps and the corresponding bit or bits of the compare data.
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公开(公告)号：HK32189A
公开(公告)日：1989-04-28
申请号：HK32189
申请日：1989-04-20
Applicant: IBM
Inventor： EGGEBRECHT LEWIS CLARK , SAENZ JESUS ANDRES
Abstract: A serial keyboard interface (28) connects a self scanning programmable serialized keyboard (40) to the system bus (10) of a data processing system. A cable (42) containing only a clock wire (52) and a data wire (58) provides the connection. The keyboard transmits a 9-bit scan out code consisting of a start bit followed by eight serial data bits. The keyboard clock line (52) is connected to the clock or shift terminal of a serial-to-parallel shift register encoder (62) for shifting the data bits on data line (58) into the encoder which has eight parallel output data lines (A, B . . . G, H) connected to the system bus. When the encoder (62) contains a complete scan out frame, the start bit is in the most significant stage (h') and sets the D-type latch (68) to apply a CPU interrupt request to the system bus (10). At this time, the &upbar& Q output of latch (68) pulls down the data line to ground potential, thereby disabling the data line and preventing further keyboard transmission of data. When the interrupt request is granted by the CPU, a clear signal resets latch (68) to remove ground potential from data line (58) and thereby permit further transmission of data.
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公开(公告)号：GB2162026B
公开(公告)日：1987-10-28
申请号：GB8513016
申请日：1985-05-23
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
IPC: G09G5/18 , G06F3/153 , G09G1/16 , G09G1/28 , G09G5/00 , G09G5/02 , G09G5/04 , G09G5/36 , H04N3/27
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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公开(公告)号：BR8503045A
公开(公告)日：1986-03-11
申请号：BR8503045
申请日：1985-06-25
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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Patent Agency Ranking
公开(公告)号：GB2105156A
公开(公告)日：1983-03-16
申请号：GB8222694
申请日：1982-08-06
Applicant: IBM
Inventor： DEAN MARK EDWARD , SAENZ JESUS ANDRES , EGGEBRECHT LEWIS CLARK , KUMMER DAVID ALLEN
Abstract: A central processing unit (10) loads a border register (36) with four color bits representing digital color signals to be used in determining the color of only the border area surrounding the video area of a cathode ray tube display screen (14). A BORDER CONTROL TIME signal is generated at the appropriate times in the horizontal and vertical scanning periods of the cathode ray tube to apply the digital color border signal (R, G, B, I) through multiplexer (32) to a composite video signal generator (38) which generates the composite video signal for a TV set (14) or a TV monitor.
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公开(公告)号：MY103253A
公开(公告)日：1993-05-29
申请号：MYPI19880315
申请日：1988-03-26
Applicant: IBM
Inventor： SAENZ JESUS ANDRES , EGGEBRECHT LEWIS CLARK
Abstract: A SERIAL KEYBOARD INTERFACE (28) CONNECTS A SELF-SCANNING PROGRAMMABLE SERIALIZED KEYBOARD (40) TO THE SYSTEM BUS (10) OF A DATA PROCESSING SYSTEM. A CABLE (42) CONTAINING ONLY A CLOCK WIRE (52) AND A DATA WIRE (58) PROVIDES THE CONNECTION. THE KEYBOARD TRANSMITS A 9-BIT SCAN OUT CODE CONSISTING OF A START BIT FOLLOWED BY EIGHT SERIAL DATA BITS. THE KEYBOARD CLOCK LINE (52) IS CONNECTED TO THE CLOCK OR SHIFT TERMINAL OF A SERIAL-TO-PARALLEL SHIFT REGISTER ENCODER (62) FOR SHIFTING THE DATA BITS ON DATA LINE (58) INTO THE ENCODER WHICH HAS EIGHT PARALLEL OUTPUT DATA LINES (A,B,....G,H) CONNECTED TO THE SYSTEM BUS. WHEN THE ENCODER (62) CONTAINS A COMPLETE SCAN OUT FRAME, THE START BIT IS IN THE MOST SIGNIFICANT STAGE (H'') AND SETS THE D-TYPE LATCH (68) TO APPLY A CPU INTERRUPT REQUEST TO THE SYSTEM BUS (10). AT THIS TIME, THE O OUTPUT OF LATCH (68) PULLS DOWN THE DATA LINE TO GROUND POTENTIAL, THEREBY DISABLING THE DATA LINE AND PREVENTING FURTHER KEYBOARD TRANSMISSION OF DATA. WHEN THE INTERUUPT REQUEST IS GRANTED BY THE CPU, A CLEAR SIGNAL RESETS LATCH (68) TO REMOVE GROUND POTENTIAL FROM DATA LINE (58) AND THEREBY PERMIT FURTHER TRANSMISSION OF DATA.(FIG 2)
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公开(公告)号：BR9100844A
公开(公告)日：1991-11-05
申请号：BR9100844
申请日：1991-03-01
Applicant: IBM
Inventor： LUCAS BRUCE DAVID , RACKLEY DARWIN P , SAENZ JESUS ANDRES
Abstract: Method and apparatus for converting multibit pixel data to a lesser number of bit pixel data and re-expanding the compressed data. Luminance data for each pixel is established as the 5 most significant bits of the original luminance signal. The chrominance information for groups of pixels is subsampled, and a common chrominance value assigned to each of the pixels in a group. The resulting compressed pixels may be 8 bits wide providing economical possibilities to store the 8 bit wide data. The data is expanded for display by adding lower order data bits to the compressed luminance signal data bits. A subsampled chrominance data signal is appended to the expanded luminance data for display.
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公开(公告)号：AT49315T
公开(公告)日：1990-01-15
申请号：AT84107799
申请日：1984-07-05
Applicant: IBM
Inventor： KUMMER DAVID ALLEN , SAENZ JESUS ANDRES , TRYNOSKY STEPHEN WAYNE
IPC: G09G5/00 , G06F3/00 , G06F3/14 , G06F7/02 , G06T7/00 , G09G1/16 , G09G5/02 , G09G5/393 , G09G5/395 , G06F15/70
Abstract: In a bit mapped raster scan digital display system, a number of maps (MAPO-MAP3), each contain a single component of the display data and are read together to provide sets of bytes, each set representing eight pel defining groups. A compare system is provided for determining when a pel group in a set of bytes compares with a reference pel defining group. For the, or each, pair of maps, the compare system compares each bit of the two bytes of data with the correspondingly positioned bit of the reference group to provide outputs when a corresponding bit in each of the bytes compares with the two reference bits. When more than two maps are employed the compare outputs related to all of the pairs of maps are combined to provide an output signal when a pel group in a byte from the maps compares with the reference bits. In a modification of the system, the comparison can be made between one or more of the maps and the corresponding bit or bits of the compare data.
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公开(公告)号：DE3278546D1
公开(公告)日：1988-06-30
申请号：DE3278546
申请日：1982-07-23
Applicant: IBM
Inventor： SAENZ JESUS ANDRES , DEAN MARK EDWARD , KUMMER DAVID ALLEN
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