公开(公告)号：DE10250204A1

公开(公告)日：2004-05-13

申请号：DE10250204

申请日：2002-10-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  SECK MARTIN ,  LACHNER RUDOLF

IPC: H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/08 ,  H01L29/732

Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

公开(公告)号：DE10151203A1

公开(公告)日：2003-08-07

申请号：DE10151203

申请日：2001-10-17

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/76

公开(公告)号：DE50115869D1

公开(公告)日：2011-06-16

申请号：DE50115869

申请日：2001-02-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FRANOSCH MARTIN ,  SCHAEFER HERBERT ,  MEISTER THOMAS ,  STENGL REINHARD

IPC: H01L29/732 ,  H01L21/331

公开(公告)号：DE102006046727A1

公开(公告)日：2008-04-24

申请号：DE102006046727

申请日：2006-10-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  LACHNER RUDOLF

IPC: H01L21/8222 ,  H01L29/93

Abstract: The method involves producing highly doped connection zones (10a-10c) in a semiconductor substrate (1) and a semiconductor layer in component areas (A, C), respectively. Another semiconductor layer is produced on the former layer that is produced on the substrate. Doped substances are implanted in the areas for forming a cathode zone of a varactor, which extends in a vertical direction until to the connection zones, and for forming a collector zone of a high frequency transistor, which extends in the vertical direction until to one of the zones, respectively.

公开(公告)号：DE10220578A1

公开(公告)日：2003-11-27

申请号：DE10220578

申请日：2002-05-08

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOECK JOSEF ,  FRANOSCH MARTIN ,  SCHAEFER HERBERT ,  STENGL REINHARD ,  MEISTER THOMAS

IPC: H01L29/45 ,  H01L29/737 ,  H01L29/732 ,  H01L29/73

Abstract: Bipolar transistor comprises an emitter region (3) electrically contacted via an emitter electrode (1), a base region (4) electrically contacted via a base electrode (2), and a collector region (5) electrically contacted via a collector electrode. At least one of the electrodes contains silicon-germanium.

公开(公告)号：AT508475T

公开(公告)日：2011-05-15

申请号：AT01927654

申请日：2001-02-07

Applicant: INFINEON TECHNOLOGIES AG

Inventor： FRANOSCH MARTIN ,  SCHAEFER HERBERT ,  MEISTER THOMAS ,  STENGL REINHARD

IPC: H01L29/732 ,  H01L21/331

公开(公告)号：DE102006046727B4

公开(公告)日：2010-02-18

申请号：DE102006046727

申请日：2006-10-02

Applicant: INFINEON TECHNOLOGIES AG

Inventor： MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  LACHNER RUDOLF

IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/06 ,  H01L29/737 ,  H01L29/93

公开(公告)号：SG155055A1

公开(公告)日：2009-09-30

申请号：SG2007029515

申请日：2003-10-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： BOECK JOSEF ,  LACHNER RUDOLF ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  SECK MARTIN ,  STENGL REINHARD

IPC: H01L21/331 ,  H01L21/8222 ,  H01L27/082 ,  H01L29/08

Abstract: Method for producing transistor structure The invention relates to a method for fabricating a transistor structure, comprising at least a first and a second bipolar transistor having different collector widths. The invention is distinguished by the fact that all junctions between differently doped regions have a sharp interface. In this case, by way of example, a first collector region 2.1 is suitable for a high- frequency transistor with high limiting frequencies fT and a second collector region 2.2 is suitable for a high-voltage transistor with increased breakdown voltages. Figure 3c

公开(公告)号：DE10250204B8

公开(公告)日：2008-09-11

申请号：DE10250204

申请日：2002-10-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  SECK MARTIN ,  LACHNER RUDOLF

IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/082 ,  H01L29/08 ,  H01L29/732

Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

公开(公告)号：DE10250204B4

公开(公告)日：2008-04-30

申请号：DE10250204

申请日：2002-10-28

Applicant: INFINEON TECHNOLOGIES AG

Inventor： STENGL REINHARD ,  MEISTER THOMAS ,  SCHAEFER HERBERT ,  BOECK JOSEF ,  SECK MARTIN ,  LACHNER RUDOLF

IPC: H01L21/8222 ,  H01L21/331 ,  H01L27/082 ,  H01L29/08 ,  H01L29/732

Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.