Abstract:
PROBLEM TO BE SOLVED: To provide an integrated circuit structure having a metal wiring opening up the possibilities of new applications such as an improvement in electrical characteristics such as a conformity to a reduction in the resistance of a conductive path and an increase in current requirements, especially the manufacture of passive components having good electrical characteristics, and provide its manufacturing method. SOLUTION: An integrated circuit structure 10 including at least three conductive structure levels 28, 42 and 52 with elongate conductive paths 34 and 48 arranged is manufactured by a single damascene. Thereby, via levels conventionally used are omitted, and various technical effects and the possibilities of new applications are produced. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
The invention relates to a method for reducing parasitic couplings in circuits in which dummy structures are embedded in previous production method steps. The invention aims at providing a method that makes it possible to improve decoupling values and reduce the degree of complexity of said method. This is achieved in that the dummy structures (3) are removed at least partly by means of etching steps and cavities (4) are produced.
Abstract:
The invention relates to a semiconductor component comprising a substrate (1) and an insulation trench (10) which is provided in the substrate (1) and which is partially filled with an insulating material (5). A plate capacitor (40; 45; 50) is embedded in said insulating material (5). The invention also relates to a corresponding production method.
Abstract:
The invention relates to a method for producing a bipolar transistor comprising a polysilicon emitter, according to which a collector region (12) of a first conductivity type and an adjacent base region (14) of a second conductivity type are created. At least one layer (16) consisting of an insulating material is then applied, said layer or layers being structured in such a way that at least one section of the base region (14) is exposed. A layer consisting of a polycrystalline semiconductor material of the first conductivity type, which is highly doped with doping atoms, is subsequently created, in such a way that the exposed section is essentially covered. A second layer (20) consisting of a highly conductive material is then created on the layer (18) consisting of the polycrystalline semiconductor material, forming a dual-layer emitter with the latter. At least one portion of the doping atoms of the first conductivity type of the highly doped polycrystalline semiconductor layer is then caused to diffuse into the base region (14), to create an emitter region (22) of the first conductivity type.
Abstract:
The invention relates to a method for producing a bipolar transistor comprising a polysilicon emitter, according to which a collector region of a first conductivity type and an adjacent base region of a second conductivity type are created. At least one layer consisting of an insulating material is then applied, said layer or layers being structured in such a way that at least one section of the base region is exposed. A layer consisting of a polycrystalline semiconductor material of the first conductivity type, which is highly doped with doping atoms, is subsequently created, in such a way that the exposed section is essentially covered. A second layer consisting of a highly conductive material is then created on the layer consisting of the polycrystalline semiconductor material, forming a dual-layer emitter with the latter. At least one portion of the doping atoms of the first conductivity type of the highly doped polycrystalline semiconductor layer is then caused to diffuse into the base region, to create an emitter region of the first conductivity type.
Abstract:
In the inventive method of producing a base terminal structure for a bipolar transistor, an etch stop layer is applied on a single-crystal semiconductor substrate, a poly-crystal base terminal layer is produced on the etch stop layer and an emitter window is etched in the base terminal layer using the etch stop layer as an etch stop.
Abstract:
A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.
Abstract:
In the inventive method of producing a base terminal structure for a bipolar transistor, an etch stop layer is applied on a single-crystal semiconductor substrate, a poly-crystal base terminal layer is produced on the etch stop layer and an emitter window is etched in the base terminal layer using the etch stop layer as an etch stop.