公开(公告)号：JPH03295254A

公开(公告)日：1991-12-26

申请号：JP9718990

申请日：1990-04-12

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NARAOKA HIROKI

IPC: H01L21/677 ,  H01L21/68

Abstract: PURPOSE:To enable a semiconductor substrate suction device to be rotated as it sucks a semiconductor substrate by a method wherein a semiconductor substrate sucking section provided with a suction hole is fitted to the tip of a rod in a rotatable manner. CONSTITUTION:A vane 8 is fitted to a rotary part 12 of a sucking part 5, and air is blown against the vane 8. Air required for rotating the vane 8 is supplied from a nozzle through which air is taken in from outside. Air rotating the vane 8 is forcibly exhausted outside through an exhaust pipe 10, and the rotation of the vane 8 is controlled by an exhaust switch 11 inserted at the intermediate point of the exhaust pipe 10. Photosensors are arranged on a part of a rod 3 in lines so as to automatically detect an orifra 7, whereby the orifra 7 is detected and automatically positioned even if a semiconductor substrate 4 is sucked by the suction part 5 off its center.

公开(公告)号：JPH0316215A

公开(公告)日：1991-01-24

申请号：JP15187389

申请日：1989-06-14

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NARAOKA HIROKI

IPC: H01L21/316

Abstract: PURPOSE:To improve quality of a silicon thermal oxide film and improve oxidation conditions (drop in temperature, reduction in time) by forming a thermal oxide film in manufacturing a semiconductor device by means of mixed gas comprising TCA (trichloroethane), hydrogen and oxygen. CONSTITUTION:A mixed gas atmosphere comprising TCA, hydrogen and oxygen is used as an oxide film formation atmosphere. Therefore when an oxide film of 250 angstrom is to be obtained for example on a silicon substrate in various oxidation atmospheres at 1000 deg.C, it takes only 12 minutes at temperature as low as 900 deg.C in the mixed gas atmosphere comprising TCA, hydrogen and oxygen while it takes 20 minutes in an oxidation atmosphere and 15 minutes in a mixed gas atmosphere of TCA and oxygen. Thus the quality of a silicon thermal oxide film can be improved as well as drop in temperature and reduction in time of the process due to increase in oxidation speed can be realized.

公开(公告)号：JPH02106959A

公开(公告)日：1990-04-19

申请号：JP26083388

申请日：1988-10-17

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NARAOKA HIROKI ,  YONEDA KENJI ,  ISHIDA TETSUO

IPC: H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

Abstract: PURPOSE:To improve the degree of integration by forming an O/N film having high reliability in an oxygen atmosphere containing trichloroethane and shaping a memory-cell capacitor by using the O/N film. CONSTITUTION:An element isolation insulating film 2 is formed onto a silicon substrate 1, and the pattern of a first conductive layer 3 is shaped. A silicon nitride film 4 is shaped onto the first conductive layer 3, the upper section of the silicon nitride film 4 is oxidized in an oxygen gas atmosphere containing trichloroethane at the anti-oxygen flow ratio of 0.95-2.00% as a trichloro group gas, a silicon oxide film 5 is formed as an O/N film 6, and a second conductive layer 7 is formed onto the O/N film 6. When the O/N film 6 is formed in the oxygen atmosphere including trichioroethane, trichloroethane reacts with oxygen, chlorine gas and steam are generated, the rate of oxidation is increased, and the reliabiliby of the O/N film 6 can be improved by the gettering effect, etc., of sodium and the positive ions of a heavy metal, etc., by chlorine gas.

公开(公告)号：JP2000133748A

公开(公告)日：2000-05-12

申请号：JP30385798

申请日：1998-10-26

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： TAKADA TAKASHI ,  OCHI TAKAO ,  NARAOKA HIROKI ,  HONMA FUTOSHI ,  MAEDA KENJI

IPC: H01L21/56 ,  H01L23/12 ,  H01L23/28

Abstract: PROBLEM TO BE SOLVED: To surely ensure planarity of the lower surface of a wiring board by preventing the adhesion of a sealing resin to the lower surface, even through a resin package is provided on the side faces of the wiring board. SOLUTION: A semiconductor chip 102 is bonded to the upper surface of a hard wiring board 100A via an adhesive layer 101, and the electrode pads in the peripheral edge section of the chip 102 are connected electrically to the connecting electrodes in the peripheral edge section of the board 100A through bonding wires 103. On the lower surface of the board 100A, land-like outside connecting terminals 105A or ball-like outside connecting terminals 105B are formed. The terminals 105A or 105B are connected electrically to the connecting electrodes of the board 100A. The semiconductor chip 102, bonding wires 103, and the upper surface and side faces of the wiring board 100A are covered with a resin package 104, but the lower sections of the side faces of the board 100A are not covered with the package 104.

公开(公告)号：JPH03241742A

公开(公告)日：1991-10-28

申请号：JP3730190

申请日：1990-02-20

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NARAOKA HIROKI

IPC: H01L21/304

Abstract: PURPOSE:To shorten a water-washing time and to prevent the reattachment of dust, etc., due to stirring of a water-washing tank by making the constitution of the title device a two-tank constitution of a steam tank equipped with a high-pressure steam injection nozzle and the water-washing tank equipped with a feed water port and water injection nozzle. CONSTITUTION:The title device is a two-tank type one combining a steam tank 7 with a water-washing tank 1 provided with a feed water port 2 and a water injection nozzle 3. At the time of cleaning a wafer, the wafer 5 after a chemical processing by means of phosphoric acid is put in a rack 4 and the rack 4 is first thrown into a steam tank 7. Then, steam is injected from an injection nozzle 8 to remove most of the phosphoric acid and dust attached to the wafer 5. Subsequently, the rack 4 is transferred to the water-washing tank 1 for the purpose of conducting rinsing by the injection of water from a nozzle 3 and continuously by the supply of water from the feed water port 2. Thus, it is possible to contrive to shorten the water-washing time of the wafer and to prevent the reattachment of dust.

公开(公告)号：JPH034513A

公开(公告)日：1991-01-10

申请号：JP14049289

申请日：1989-06-01

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NARAOKA HIROKI ,  HOZUKI TOSHITAKA

IPC: H01L21/02

Abstract: PURPOSE:To secure both uniformity of a substrate when it is processed and the stability of the substrate when it is conveyed by a method wherein a small hole or a marking whose position can be confirmed is provided in the vicinity of the outer circumference of a semiconductor substrate of perfectly round shape. CONSTITUTION:A small hole 2 of 1mm or thereabouts in diameter is provided in the vicinity of the outer circumference of a semiconductor of perfectly round shape, the vertical and right and left positions of a semiconductor manufactured article can be confirmed using the sensor such as infrared rays and the like. Through the above-mentioned procedures, the substrate 1 can be processed or conveyed in the state of perfectly round shape, uniformity and sureness can be improved, and the yield of production can also be enhanced. Besides, the above-mentioned small hole may be formed in any shape if it is in the range of size with which the above-mentioned position can be detected. Besides, if the substrate 1 satisfies a perfectly round shape, a marking may be stamped.

公开(公告)号：JPH0245933A

公开(公告)日：1990-02-15

申请号：JP19745688

申请日：1988-08-08

Applicant: MATSUSHITA ELECTRONICS CORP

Inventor： NARAOKA HIROKI

IPC: H01L21/3205

Abstract: PURPOSE:To prevent burnout of a polycrystal silicon film at the upper layer from occurring by performing pattern formation of the polycrystal silicon film at the lower layer using an isotropic etching to provide a taper. CONSTITUTION:A silicon dioxide film 2 is formed on the surface of a silicon substrate 1 and a polycrystal silicon film 3 is formed on it. Wet etching is performed with fluorine nitric acid liquid using a mask pattern 4 of photoresist to allow the polycrystal silicon film 3 to be in taper shape. After eliminating a photoresist 4, the surface of the polycrystal silicon film 3 is oxidized by heat treating to form a silicon dioxide film 5. Furthermore, a polycrystal silicon film 6 is formed on the film 5. The sectional area of the lower-layer polycrystal silicon film 3 is etched in taper shape, thus preventing burnout of a wiring due to the upper-layer polycrystal silicon film 6 from occurring.