公开(公告)号：JP2009076928A

公开(公告)日：2009-04-09

申请号：JP2008286947

申请日：2008-11-07

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA

IPC: H05K3/46

CPC classification number: H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method capable of easily obtaining a circuit board having no core substrate and the circuit board obtained thereby.
SOLUTION: The manufacturing method forming a metal foil adhered body 5 where two metal foils 5a, 5b that can be separated by heating are adhered, a first dielectric sheet 11 that is formed to enclose the metal foil adhered body 5 and is adhered to a ground dielectric layer 21 to seal the metal foil adhered body 5, a first conductor layer 31 formed on the first conductor sheet 11, and a first via conductor 41 that connects the first conductor layer 31 with the metal foil adhered body 5 on the ground dielectric layer 21 formed on a support substrate 20 for reinforcement upon manufacturing in order to manufacture the circuit board that has no core substrate and whose both principal surfaces are composed of a dielectric layer, wherein of a laminated sheet 10, after its periphery is removed and the end of a wiring laminated section 100 is exposed, heating is performed, the wiring laminated section 100 is exfoliated from the support substrate 20 with one metal foil 5b adhered.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种能够容易地获得没有芯基板的电路板和由此获得的电路板的制造方法。 解决方案：形成金属箔附着体5的制造方法，其中两个可通过加热分离的金属箔5a，5b被粘合，形成为包围金属箔粘附体5并被粘附的第一电介质片11 到接地电介质层21以密封金属箔附着体5，形成在第一导体片11上的第一导体层31和将第一导体层31与金属箔附着体5连接在第一导体层31上的第一通孔导体41 接地电介质层21，其形成在用于加强的支撑基板20上，用于制造不具有芯基板的电路板，并且其两个主表面由电介质层构成，其中层压片10在其周边被去除之后 并且布线层叠部100的端部露出，进行加热，布线层叠部100从粘接有金属箔5b的支撑基板20剥离。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2005302969A

公开(公告)日：2005-10-27

申请号：JP2004116078

申请日：2004-04-09

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA

IPC: H05K3/46 ,  H01L23/12

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board that has no core substrate and can be reduced in warping.
SOLUTION: The wiring board 1, which connects semiconductor chips to each other, has a laminate BU formed by alternatively laminating two or more dielectric layers and two or more conductor layers upon another so that the first and second main surfaces MP1 and MP2 of the laminate BU may be formed of dielectric layers, a plurality of metallic terminal pads PD1 and PD2 formed on the first and second main surfaces MP1 and MP2, and a reinforcing frame ST which secures flatness by reinforcing the laminate BU. The semiconductor chips and reinforcing frame ST are arranged on the first main surface and at least part of the metallic terminal pads PD1 and PD2 are electrically connected to internal conductor layers positioned in the laminate BU through via holes. At the same time, the metallic terminal pads PD1 and PD2 and semiconductor chips are flip-chip connected to each other through soldered connections and the Young's modulus of the reinforcing frame ST is adjusted to 150-350 GPa. Since the Young's modulus of the reinforcing frame ST is high, the warping of the wiring board can be reduced.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种不具有芯基板并且可以减少翘曲的布线板。 解决方案：将半导体芯片彼此连接的布线板1具有通过交替层叠两个或更多个电介质层和另外两个或更多个导体层而形成的层叠体BU，使得第一和第二主表面MP1和MP2 可以由电介质层，形成在第一和第二主表面MP1和MP2上的多个金属端子焊盘PD1和PD2以及通过加强层叠体BU来确保平坦度的加强框架ST形成。 半导体芯片和加强框架ST布置在第一主表面上，并且金属端子焊盘PD1和PD2的至少一部分通过通孔电连接到位于层叠体BU中的内部导体层。 同时，通过焊接连接将金属端子焊盘PD1和PD2以及半导体芯片倒装连接，将加强框ST的杨氏模量调整为150-350GPa。 由于加强框架ST的杨氏模量高，所以可以减小布线基板的翘曲。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005093979A

公开(公告)日：2005-04-07

申请号：JP2004055503

申请日：2004-02-27

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method which does not have a core substrate and can easily obtain a wiring board formed by alternately laminating a dielectric layer and a conductive layer composed of polymeric materials, and to provide a wiring board obtained by the method.
SOLUTION: A laminated sheet body 10, which is provided with a metal foil contact body 5 composed by tightly adhering two metal foils 5a and 5b, a first dielectric sheet 11 which is closely attached in a surrounding region 21c of the metal foil contact body 5 to a ground surface dielectric layer 21 to seal the metal foil contact body 5, a first conductive layer 31, and a first via conductor 41 formed through the first dielectric sheet 11, is formed on the main surface of the ground surface dielectric layer 21 formed on a support substrate 20 for reinforcement at manufacturing. The peripheral part of a region on the metal foil contact body 5, as a wiring laminated part 100 to be a wiring board, is removed in the laminated sheet body 10. The wiring laminated part 100 is peeled from an interface between two metal foils 5a and 5b, with the metal foil 5b adhered to the wiring laminated part 100.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种不具有芯基板并且可以容易地获得通过交替层叠电介质层和由聚合物材料构成的导电层而形成的布线基板的制造方法，并且提供一种获得的布线板 通过该方法。 解决方案：一个层叠片体10，其设有金属箔接触体5，该金属箔接触体5由紧密粘附两个金属箔5a和5b构成，第一电介质片11紧密地附着在金属箔的周围区域21c中 接触体5到地表面电介质层21以密封金属箔接触体5，第一导电层31和穿过第一电介质片11形成的第一通孔导体41形成在接地表面电介质的主表面上 形成在用于制造时加强的支撑基板20上的层21。 金属箔接触体5的作为布线板的布线层叠部100的区域的周边部分在层压片体10中被除去。布线层叠部100从两个金属箔5a之间的界面剥离 和5b，金属箔5b粘附到布线层压部件100.版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2005072063A

公开(公告)日：2005-03-17

申请号：JP2003209115

申请日：2003-08-27

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board containing a relatively thin metallic core substrate, high-density wiring layers, etc., and to provide a method by which the wiring board can be manufactured accurately and efficiently.
SOLUTION: The wiring board 1 comprises the metallic core substrate 2 having a front surface 3 and a rear surface 4, a plurality of insulating layers 8, 16, 22, 9, 15, and 23 respectively formed above the front surface 3 and rear surface 4 of the core substrate 2, and wiring layers 14, 20, 13, and 21 positioned among the insulating layers 8, 16, 22, 9, 15, and 23, The wiring board 1 also comprises through holes 2a formed through the core substrate 2 from the front surface 3 to the rear surface 4 and first via conductors 6 which connect conductor layers 5 formed on the rear surface 4 of the core substrate 2 after passing through the through holes 2a and the wiring layer 14 formed above the front surface 3 of the substrate 2 on which the conductor layers 5 are not formed.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种包含相对薄的金属芯基板，高密度布线层等的布线板，并且提供可以精确高效地制造布线板的方法。 解决方案：布线板1包括具有前表面3和后表面4的金属芯基板2，分别形成在前表面3上的多个绝缘层8,16,29,93和23 芯基板2的后表面4以及位于绝缘层8,16,29,93和23之间的布线层14,20,13和21。布线基板1还包括通孔2a 核心基板2从前表面3到后表面4以及第一通孔导体6，第一通孔导体6连接形成在芯基板2的后表面4上的导体层5，在穿过通孔2a和布线层14之后形成 未形成导体层5的基板2的前表面3。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2003218286A

公开(公告)日：2003-07-31

申请号：JP2002017133

申请日：2002-01-25

Applicant: NGK SPARK PLUG CO

Inventor： ITO TATSUYA

IPC: H05K1/09 ,  H01L23/12 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board having a highly reliable and sufficiently high connection terminal to be connected to an external terminal such as an electronic component, and to provide a method for manufacturing the wiring board. SOLUTION: This wiring board 101 is provided with a first insulating layer 111 configuring a board main face 102, and having a main face side opening 121 opened in the board main face 102 and a metallic layer 125 projected from the main face side opening 121 by 5 μm or more over the board main surface 102. The metallic layer 125 is provided with a Cu layer 126 projected from the main face side opening 121 over the board main surface 102, and an Ni layer 127 coating the surface of the Cu layer 126 to configure the surface of the metallic layer 125. COPYRIGHT: (C)2003,JPO

公开(公告)号：JPH1154932A

公开(公告)日：1999-02-26

申请号：JP20589397

申请日：1997-07-31

Applicant: NGK SPARK PLUG CO

Inventor： ITO TATSUYA

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method wherein lowering of insulation resistance between wirings and shortcircuiting caused by plating sag phenomenon due to resist rising are prevented, by reducing height difference of sticking surfaces while using an easy-to-handle dry film resist when forming a viahole by a semi-additive method in a multilayered wiring board, wherein a lower wiring layer and an upper wiring layer are connected by a viahole. SOLUTION: A lower wiring interlaminar insulation layer 207 is formed between lower wiring layers 205 formed on a lower insulation layer 201, and an electroless plating layer 209 is further formed thereon. A photosensitive dry film DF2 is stuck thereon, an opening pattern OP2 for a lower wiring layer is shaped by exposure and development, a current is made to flow through the electroless plating layer 209, and an electrolytic plating viahole 210 is formed inside the opening. The photosensitive dry film DF2 is removed and an exposed part of the electroless plating layer 209 is etched and removed for forming a viahole 211.

公开(公告)号：JP2014107371A

公开(公告)日：2014-06-09

申请号：JP2012258279

申请日：2012-11-27

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： WADA HIDETOSHI ,  ITO TATSUYA ,  NAGAI MAKOTO

IPC: H01L23/12 ,  H05K3/46

CPC classification number: H05K1/11 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49844 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2203/0594 ,  H05K2203/0597 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board which enables connection terminals to be arranged with high density and improves degree of freedom in wiring layout and improves connection reliability of connection terminals.SOLUTION: A wiring board 100 comprises: a laminate in which one and more insulation layers 31, 131 and one and more conductor layers 32, 132 are laminated; interconnections L2, L12 formed on the laminate; a columnar connection terminal T1 which is formed directly on the interconnection L2 and contacts at least one lateral face between both lateral faces of the interconnection L2; and a solder resist layer 4 which covers the interconnection L2 and exposes at least a part of the connection terminal T1. A width of the interconnection L2 at a position where the connection terminal T1 is formed is less than a length of the connection terminal T1 in a width direction.

Abstract translation: 要解决的问题：提供一种布线板，其能够使连接端子以高密度布置，并提高布线布局的自由度并提高连接端子的连接可靠性。解决方案：布线板100包括：层叠体，其中， 更多的绝缘层31,131和一个和多个导体层32,132层叠; 形成在层压板上的互连L2，L12; 一个柱形连接端子T1，它直接形成在互连层L2上并与互连L2的两个侧面之间的至少一个侧面接触; 以及覆盖互连L2并暴露连接端子T1的至少一部分的阻焊层4。 在形成连接端子T1的位置处的互连线L2的宽度小于连接端子T1在宽度方向上的长度。

公开(公告)号：JP2014096469A

公开(公告)日：2014-05-22

申请号：JP2012247052

申请日：2012-11-09

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： NAGAI MAKOTO ,  MORI SEIJI ,  ITO TATSUYA

IPC: H01L23/12 ,  H05K3/46

CPC classification number: H01L23/49827 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/544 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16238 ,  H01L2224/81132 ,  H01L2224/81191 ,  H01L2224/81385 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/09727

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board improved in the degree of freedom of a wiring layout.SOLUTION: The wiring board according to the present invention, which has a laminate in which one or more insulating layers and one or more conductor layers are laminated, is characterized in that: it comprises a plurality of wires formed on the laminate and columnar connection terminals formed directly on at least some of the wires; and the width of the at least some of the wires at positions where the connection terminals are formed is less than the length of the connection terminals in a direction of the width.

Abstract translation: 要解决的问题：提供一种提高布线布置自由度的布线板。解决方案：根据本发明的布线板，其具有层叠体，其中一个或多个绝缘层和一个或多个导体层是 其特征在于：它包括形成在直接形成在至少一些电线上的层压体和柱状连接端子上的多根电线; 并且形成连接端子的位置处的至少一些电线的宽度小于连接端子在宽度方向上的长度。

公开(公告)号：JP2014078551A

公开(公告)日：2014-05-01

申请号：JP2012224025

申请日：2012-10-09

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： NAGAI MAKOTO ,  MORI SEIJI ,  HAYASHI TAKAHIRO ,  ITO TATSUYA

IPC: H05K3/28 ,  H05K3/34

CPC classification number: H05K1/0265 ,  H05K3/00 ,  H05K3/3452 ,  H05K3/3484 ,  H05K3/4007 ,  H05K2201/09881 ,  H05K2203/0574

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board and a wiring board manufacturing method, which can deal with a narrow pitch of connection terminals.SOLUTION: A wiring board according to the present embodiment is a wiring board which has a laminate including one and more laminated layers of an insulation layer and a conductive layer, and which comprises: a plurality of connection terminals which are formed on the laminate and each has an area of a top face is smaller than an area of each lateral faces opposite to each other; and a filling component filled in between the plurality of connection terminals. The plurality of connection terminals has an area of the top face larger than an area of each lateral face exposed from the filling component and a junction layer including a solder is formed on the top face.

Abstract translation: 要解决的问题：提供一种可以处理窄间距的连接端子的布线板和布线板的制造方法。解决方案：根据本实施例的布线板是布线板，其具有包括一个或多个 绝缘层和导电层的层压层，其包括：形成在层压板上并且每个具有顶面区域的多个连接端子小于彼此相对的每个侧面的面积; 以及填充部件，其填充在所述多个连接端子之间。 多个连接端子具有比从填充部件露出的每个侧面的面积大的面积，并且在顶面上形成包括焊料的接合层。

公开(公告)号：JP2013105908A

公开(公告)日：2013-05-30

申请号：JP2011248950

申请日：2011-11-14

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA ,  HAYASHI TAKAHIRO ,  MORI SEIJI

IPC: H05K3/34 ,  H01L23/12 ,  H05K3/24 ,  H05K3/28

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board which prevents a short circuit between connection terminals and which is applicable to narrow-pitched connection terminals.SOLUTION: A wiring board according to an embodiment in which each of insulation layers and each of wiring layers are alternately laminated, comprises: a plurality of wiring conductors formed on the insulation layer in the outermost layer at a distance from each other; salients each formed on a part of each of the plurality of wiring conductors and which are connected to electrodes of a semiconductor chip; a solder resist layer covering a wiring pattern connected to the plurality of wiring conductors, in which an opening having an opening edge that surrounds the plurality of wiring conductors is formed; and an insulation member covering a surface side of the insulation layer, which becomes an inner region of the opening so as to expose at least a part of each salient.

Abstract translation: 要解决的问题：提供一种防止连接端子之间的短路并且适用于狭窄的连接端子的布线板。 解决方案：根据实施例的布线板，其中每个绝缘层和每个布线层交替层叠，包括：多个布线导体，其形成在最外层的绝缘层上彼此间隔一定距离; 各个形成在多个布线导体中的每一个的一部分上并连接到半导体芯片的电极的凸起; 覆盖连接到所述多个布线导体的布线图案的阻焊层，其中形成有围绕所述多个布线导体的开口边缘的开口; 以及覆盖所述绝缘层的表面侧的绝缘构件，其成为所述开口的内部区域，以暴露出每个突出部的至少一部分。 版权所有（C）2013，JPO＆INPIT