公开(公告)号：EP2927950A4

公开(公告)日：2016-07-27

申请号：EP13858236

申请日：2013-05-27

Applicant: NGK SPARK PLUG CO

Inventor： WADA HIDETOSHI ,  ITO TATSUYA ,  NAGAI MAKOTO

IPC: H05K3/40 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K1/11 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49844 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/097 ,  H05K2201/09709 ,  H05K2201/09727 ,  H05K2203/0594 ,  H05K2203/0597 ,  H01L2924/00

公开(公告)号：EP2632237A4

公开(公告)日：2015-03-18

申请号：EP12817081

申请日：2012-05-16

Applicant: NGK SPARK PLUG CO

Inventor： ITO TATSUYA ,  MORI SEIJI ,  HAYASHI TAKAHIRO ,  WAKAZONO MAKOTO ,  NISHIDA TOMOHIRO

IPC: H05K3/34 ,  H05K3/28

CPC classification number: H05K1/0213 ,  H01L23/145 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/4007 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/09881 ,  H05K2201/099 ,  H05K2201/09918 ,  Y02P70/611 ,  H01L2924/00

Abstract: A wiring substrate according to the present invention includes a laminate of one or more insulation layers and one or more conductive layers and further includes a plurality of connection terminals formed on the laminate and spaced apart from one another, each having a step formed at the outer periphery of a first main surface opposite a contact surface in contact with the laminate, and a filling member provided in a filling manner between the convection terminals.

公开(公告)号：EP2894951A4

公开(公告)日：2016-08-10

申请号：EP13834871

申请日：2013-07-29

Applicant: NGK SPARK PLUG CO

Inventor： HAYASHI TAKAHIRO ,  MORI SEIJI ,  ITO TATSUYA

IPC: H05K1/09 ,  H05K3/24 ,  H05K3/34

CPC classification number: H05K1/119 ,  H05K1/0326 ,  H05K1/0346 ,  H05K1/09 ,  H05K3/20 ,  H05K3/3452 ,  H05K3/3473 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/10674 ,  H05K2203/04

Abstract: A wiring substrate includes a surface layer having electrical insulation properties and a connection terminal having electrical conduction properties and protruding from the surface layer. The connection terminal includes a base portion, a covering portion and a filling portion. The base portion of the connection terminal is made of an electrically conductive first metal and located adjacent to the surface layer so as to extend through the surface layer and protrude from the surface layer. The covering portion of the connection terminal is made of an electrically conductive second metal having a melting point lower than that of the first metal and located so as to cover the base portion. The filling portion of the connection terminal is made of at least one of the second metal and an alloy containing the first and second metals and located so as to fill a hollow in the base portion.

公开(公告)号：EP2899751A4

公开(公告)日：2016-06-22

申请号：EP13839334

申请日：2013-05-17

Applicant: NGK SPARK PLUG CO

Inventor： HAYASHI TAKAHIRO ,  NAGAI MAKOTO ,  MORI SEIJI ,  NISHIDA TOMOHIRO ,  WAKAZONO MAKOTO ,  ITO TATSUYA

IPC: H01L23/12 ,  G03F7/038 ,  G03F7/20 ,  H01L21/60 ,  H01L23/498 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K1/111 ,  G03F7/038 ,  G03F7/20 ,  G03F7/2024 ,  G03F7/30 ,  H01L23/49822 ,  H01L2224/16237 ,  H05K1/0298 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/4644 ,  H05K2201/09409 ,  H05K2201/09427 ,  H05K2201/09709 ,  H05K2201/09845 ,  H05K2201/099 ,  H05K2201/10674 ,  H05K2203/058 ,  H05K2203/0594 ,  H05K2203/1476

Abstract: To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10. The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25. Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction. The solder resist layer 25 includes, within the opening portion 43, a side-surface covering portion 55 that covers the side surface of the connecting terminal portion 41 and a projecting wall portion 56 that is integrally formed with the side-surface covering portion 55 and disposed to project so as to intersect with the connection region 51.

公开(公告)号：EP2784807A4

公开(公告)日：2015-01-28

申请号：EP13824470

申请日：2013-05-27

Applicant: NGK SPARK PLUG CO

Inventor： HAYASHI TAKAHIRO ,  NAGAI MAKOTO ,  ITO TATSUYA ,  MORI SEIJI ,  WAKAZONO MAKOTO ,  NISHIDA TOMOHIRO

IPC: H01L23/498 ,  H01L21/48 ,  H05K3/34

CPC classification number: H05K3/4007 ,  H01L21/4846 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/81 ,  H01L2224/10175 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/0298 ,  H05K1/0366 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/4661 ,  H05K3/4688 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2201/10674 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

公开(公告)号：JP2014093512A

公开(公告)日：2014-05-19

申请号：JP2012245250

申请日：2012-11-07

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： HAYASHI TAKAHIRO ,  NAGAI MAKOTO ,  ITO TATSUYA ,  MORI SEIJI ,  WAKAZONO MAKOTO ,  NISHIDA TOMOHIRO

IPC: H01L23/12 ,  H05K3/28 ,  H05K3/46

CPC classification number: H05K3/4007 ,  H01L21/4846 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/81 ,  H01L2224/10175 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81464 ,  H01L2224/81815 ,  H01L2924/12042 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/0298 ,  H05K1/0366 ,  H05K3/28 ,  H05K3/3452 ,  H05K3/4661 ,  H05K3/4688 ,  H05K2201/09845 ,  H05K2201/09881 ,  H05K2201/10674 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board in which a wiring conductor is successfully protected by a fine and strong dam part formed in an outermost surface layer of a laminate and which has excellent reliability in connection with a semiconductor chip.SOLUTION: A wiring board 10 comprises a laminate 31 including a plurality of connection terminals 41 and a plurality of wiring conductors 62 as a conductor layer 24 in an outermost surface layer. Each wiring conductor 62 is arranged to pass between a plurality of connection terminal parts 41 for flip-chip mounting a semiconductor chip 51. A resin insulation layer 23 in the outermost surface layer of the laminate includes dam parts 63 and reinforcement parts 64. Each dam part 63 covers each wiring conductor 62. The reinforcement part 64 is formed between the adjacent connection terminal parts 41 to have a height lower than a height H3 of the dam part 63. Each reinforcement part 64 is joined to a lateral face of the dam part 63.

Abstract translation: 要解决的问题：提供一种布线基板，其中布线导体被形成在层叠体的最外表面层中的细小且强大的坝部成功地保护，并且与半导体芯片相关联的可靠性优异。解决方案：布线 板10包括层叠体31，其包括多个连接端子41和作为最外表面层中的导体层24的多个布线导体62。 每个布线导体62布置成在多个用于倒装芯片安装半导体芯片51的连接端子部分41之间通过。层压体的最外表面层中的树脂绝缘层23包括坝部件63和加强件64.每个坝 部分63覆盖每个布线导体62.加强部分64形成在相邻的连接端子部分41之间，具有低于坝部63的高度H3的高度。每个加强部分64连接到坝部分的侧面 63。

公开(公告)号：JP2014089996A

公开(公告)日：2014-05-15

申请号：JP2012237496

申请日：2012-10-29

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA ,  MORI SEIJI ,  NAGAI MAKOTO

IPC: H01L23/28 ,  H01L23/12 ,  H05K3/28

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board which can effectively inhibit the outflow of an underfill agent and effectively inhibit the occurrence of a void between connection terminals.SOLUTION: A wiring board according to the present embodiment in which a plurality of connection terminals with a semiconductor chip are formed on a laminate in which an insulation layer and a conductor layer are layered comprises: a solder resist layer provided on the laminate, in which a first opening having an outer edge at a position surrounding a mounting region of the semiconductor chip, and a second opening which exposes the connection terminals in the mounting region and has a bottom face at a position lower than a top edge of the connection terminals are formed.

Abstract translation: 要解决的问题：提供一种可以有效地抑制底部填充剂的流出并有效地抑制连接端子之间的空隙的发生的布线基板。解决方案：根据本实施例的布线板，其中多个连接端子具有 形成层叠体的绝缘层和导体层层叠的半导体芯片包括：设置在层叠体上的阻焊层，其中，在包围半导体芯片的安装区域的位置处具有外缘的第一开口 并且形成第二开口，其将安装区域中的连接端子露出，并且在低于连接端子的顶部边缘的位置处具有底面。

公开(公告)号：JP2014053450A

公开(公告)日：2014-03-20

申请号：JP2012196864

申请日：2012-09-07

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： HAYASHI TAKAHIRO ,  MORI SEIJI ,  ITO TATSUYA

IPC: H05K3/34 ,  H05K1/09

CPC classification number: H05K1/092 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/13101 ,  H01L2224/16238 ,  H01L2224/27013 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81411 ,  H01L2224/81455 ,  H01L2224/92125 ,  H05K3/243 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0769 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0597 ,  H01L2924/014 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To prevent insulation failure due to migration (metal transition) in a wiring board.SOLUTION: A wiring board includes: a base layer; multiple connection terminals; and a surface layer. The base layer has electrical insulation properties. The multiple connection terminals have conductivity and are formed on the base layer. The surface layer has electric insulation properties and fills spaces between the multiple connection terminals on the base layer. The connection terminal includes: a conductive base part made of a first metal; and a conductive cover part which is made of a second metal different from the first metal. The cover part covers the base part so as to penetrate the surface layer and reach the base layer.

Abstract translation: 要解决的问题：为了防止由于布线板中的迁移（金属转移）导致的绝缘失效。解决方案：布线板包括：基层; 多个连接端子; 和表面层。 基层具有电绝缘性能。 多个连接端子具有导电性并形成在基底层上。 表面层具有电绝缘性能，并填充基层上的多个连接端子之间的空间。 连接端子包括：由第一金属制成的导电基部; 以及由与第一金属不同的第二金属制成的导电盖部分。 覆盖部分覆盖基部以便穿透表面层并到达基层。

公开(公告)号：JP2014044979A

公开(公告)日：2014-03-13

申请号：JP2012184943

申请日：2012-08-24

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： ITO TATSUYA ,  NAGAI MAKOTO ,  WADA HIDETOSHI

IPC: H05K1/02 ,  H01L21/56 ,  H01L21/60 ,  H01L23/28

CPC classification number: H01L2224/16 ,  H01L2224/73204 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012

Abstract: PROBLEM TO BE SOLVED: To provide a wiring board where filling failure of an underfill is inhibited without impairing the strength of the wiring board.SOLUTION: A wiring board includes a first surface, a second surface, and multiple connection terminals. The first surface has electrical insulation properties, and an opening is formed on the first surface. The second surface has electrical insulation properties and dents relative to the first surface at the inner side of the opening. The multiple connection terminals have conductivity, are arranged in a matrix manner, and are exposed at the inner side of the opening. The second surface includes a first region where the multiple connection terminals are disposed, a second region enclosing the first region, and a third region formed by locally extending the second region to the outer side.

Abstract translation: 要解决的问题：提供一种在不损害布线板的强度的同时抑制底部填充物的填充故障的布线板。解决方案：布线板包括第一表面，第二表面和多个连接端子。 第一表面具有电绝缘性能，并且在第一表面上形成开口。 第二表面相对于开口内侧的第一表面具有电绝缘性能和凹痕。 多个连接端子具有导电性，以矩阵方式布置，并且在开口的内侧露出。 第二表面包括其中设置多个连接端子的第一区域，包围第一区域的第二区域和通过将第二区域局部延伸到外侧而形成的第三区域。

公开(公告)号：JP2011138869A

公开(公告)日：2011-07-14

申请号：JP2009296911

申请日：2009-12-28

Applicant: Ngk Spark Plug Co Ltd ,  日本特殊陶業株式会社

Inventor： MAEDA SHINNOSUKE ,  SUZUKI TETSUO ,  HANTO TAKUYA ,  ITO TATSUYA ,  HIRANO SATOSHI ,  SUGIMOTO ATSUHIKO

IPC: H05K3/46 ,  H05K3/00 ,  H05K3/24

CPC classification number: H05K1/0298 ,  H01L21/4846 ,  H01L23/49822 ,  H01L2224/16225 ,  H05K1/09 ,  H05K1/111 ,  H05K1/113 ,  H05K3/0055 ,  H05K3/3452 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer wiring substrate by which surface roughness of an outermost layer can be set to a suitable state. SOLUTION: In a build-up step, a wiring laminate portion 30 is formed by alternately laminating a plurality of resin insulating layers 21 to 24 and a plurality of conductor layers 26 in multilayer arrangement on a base 52 having copper foils 55 and 56 separably laminated and arranged on one surface. In a drilling step, a plurality of openings 35 and 36 are formed in the resin insulating layer 24 as the outermost layer through laser hole processing to expose respective connection terminals 41 and 42. Smears in the openings 35 and 36 are removed thereafter through a desmear step. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种制造多层布线基板的方法，通过该方法可以将最外层的表面粗糙度设置为适当的状态。 解决方案：在堆积步骤中，通过在具有铜箔55的基座52上交替地层叠多个树脂绝缘层21至24和多层布置的多个导体层26而形成布线层叠部30， 56可分离地层叠并布置在一个表面上。 在钻孔步骤中，通过激光孔处理在树脂绝缘层24中形成多个开口35和36作为最外层，以露出相应的连接端子41和42.此后，开口35和36中的涂层被去除 步。 版权所有（C）2011，JPO＆INPIT