公开(公告)号：FR2801425A1

公开(公告)日：2001-05-25

申请号：FR9914480

申请日：1999-11-18

Applicant: ST MICROELECTRONICS SA

Inventor： DELPECH PHILIPPE ,  ARNAL VINCENT

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L29/92 ,  H01G4/08 ,  H01G4/33

公开(公告)号：DE60239200D1

公开(公告)日：2011-03-31

申请号：DE60239200

申请日：2002-06-13

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  FORTUIN ARNOUD ,  ARNAL VINCENT

IPC: H01L21/3065 ,  H01L21/316 ,  H01L21/76 ,  H01L21/762 ,  H01L21/764

公开(公告)号：DE60130947T2

公开(公告)日：2008-07-31

申请号：DE60130947

申请日：2001-08-16

Applicant: ST MICROELECTRONICS SA

Inventor： ARNAL VINCENT ,  TORRES JOAQUIM

IPC: H01L21/02

Abstract: The fabrication of a metal plate capacitor in the metallisation levels above an integrated circuit consists of depositing an insulating layer (11) of between 0.5 and 1.5 microns on the surface of an integrated circuit (10). Method then involves grooving the insulating layer to form slabs (12), depositing and smoothing a metallic material (14) to form conducting lines (L1, L2, L3, L4) in the slabs, locally drawing the insulating layer to eliminate all the gaps separating two conducting lines, depositing a dielectric layer (16) and depositing and engraving a second metallic material (17) to at least completely fill the inter-line gaps.

公开(公告)号：FR2826179A1

公开(公告)日：2002-12-20

申请号：FR0107774

申请日：2001-06-14

Applicant: ST MICROELECTRONICS SA

Inventor： MARTY MICHEL ,  FORTUIN ARNOUD ,  ARNAL VINCENT

IPC: H01L21/3065 ,  H01L21/316 ,  H01L21/76 ,  H01L21/762 ,  H01L21/764 ,  H01L27/04

Abstract: A deep insulating trench comprises side walls (11) and a base (10) in a semiconductor substrate (1). The side walls and base are covered with an electrically insulating material (12) which defines an empty cavity (13) and forms a plug (14) to seal the cavity. The side walls are configured with a neck (15) for determining the position of the plug and a first portion (16) which tapers out towards the neck with increasing separation from the base. Independent claims are also included for: (a) an integrated circuit incorporating such a deep insulating trench; (b) an electronic or electric apparatus incorporating the integrated circuit; and (c) a method for the realization of the deep insulating trench in a semiconductor substrate.