公开(公告)号：DE69534509D1

公开(公告)日：2006-02-23

申请号：DE69534509

申请日：1995-11-23

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC

IPC: F23Q3/00 ,  H01L21/822 ,  H01L27/06 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861

Abstract: The device includes a region of the emitter of the parallel transistor (Tr) which sets of the circuit corresponds to the cathode region of the control thyristor (Th1) while the base of the transistor corresponds to the trigger region of the control thyristor. A region of conductivity corresp. to that of the substrate replaces a part of the anode region of the control thyristor opposite its cathode region. There are two vertical NPNP regions corresp. to the two thyristors with the two anodes corresp. to the same layer on a metallised rear surface which also contacts the replaced part. Metallisations are also formed on the principal thyristor cathode and between the control thyristor cathode and the principal thyristor trigger.

公开(公告)号：DE69728937T2

公开(公告)日：2005-04-28

申请号：DE69728937

申请日：1997-07-24

Applicant: ST MICROELECTRONICS SA

Inventor： PEZZANI ROBERT ,  BERNIER ERIC

IPC: H01L29/73 ,  H01L21/331 ,  H01L27/06 ,  H01L29/732 ,  H01L29/74 ,  H01L29/744

Abstract: The structure includes an isolation wall (6) of a first conductivity type,formed in a semiconductor wafer (1) of a second conductivity type, separating a first portion of the wafer containing a high voltage thyristor with a layer corresponding to the wafer thickness, from a second portion containing logic circuit elements. The back face is uniformly coated with a metallisation layer (M1) in contact with the portions of the wafer. The thyristor is produced in lateral form, the isolation wall being in electrical contact with a control region of the same conductivity type as the thyristor and the logic portion includes a vertical component (20) with a main contact corresponding to the back face metallisation.

公开(公告)号：FR2816127A1

公开(公告)日：2002-05-03

申请号：FR0014005

申请日：2000-10-31

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  LAUR JEAN PIERRE ,  SANCHEZ JEAN LOUIS ,  AUSTIN PATRICK ,  BREIL MARIE ,  BERNIER ERIC

IPC: H02M1/08 ,  H02M5/257 ,  H01F38/00

Abstract: The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made of ferromagnetic material. At each current alternation of the network, the interrogation of the magnetic state of the strand results in the presence, or not, of a control signal on the power device (Sw).

公开(公告)号：DE69428657D1

公开(公告)日：2001-11-22

申请号：DE69428657

申请日：1994-11-25

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC ,  BALLON CHRISTIAN

IPC: H01L29/866 ,  H01L21/822 ,  H01L27/02 ,  H01L27/04 ,  H01L27/08 ,  H02H3/22 ,  H01L29/87

公开(公告)号：FR2788166B1

公开(公告)日：2001-03-09

申请号：FR9816771

申请日：1998-12-31

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  SANCHEZ JEAN LOUIS ,  LAUR JEAN PIERRE ,  BREIL MARIE ,  AUSTIN PATRICK ,  BERNIER ERIC ,  ROY MATHIEU

IPC: H01L29/74 ,  H01L21/822 ,  H01L27/04 ,  H01L27/06 ,  H01L29/739 ,  H01L29/78 ,  H01L27/07 ,  H02M1/00 ,  H03K17/567

公开(公告)号：DE69609558T2

公开(公告)日：2001-01-18

申请号：DE69609558

申请日：1996-05-06

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC

IPC: H01L27/06 ,  H01L27/02 ,  H02H9/04 ,  H04Q3/42

Abstract: The component includes an n-type substrate (3) whose rear face has a heavily-doped layer (4) under its metallisation (21), to which the cathodes of the two diodes and the collectors of the two n-p-n transistors are earthed. The anodes of the diodes are formed in heavily-doped p-type regions (5,6), and the transistors occupy a lightly-doped p-well (7) with metallisations (24,25) connecting their emitters to the anodes of the corresponding diodes.

公开(公告)号：DE69730761T2

公开(公告)日：2005-09-29

申请号：DE69730761

申请日：1997-01-24

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC ,  SIMONNET JEAN-MICHEL

IPC: H01L21/336 ,  H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01L29/735 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861

Abstract: A method of regulating the gain or sensitivity of a lateral component, formed in the upper surface of a first conductivity type semiconductor wafer (N1), involves subjecting the back face to no doping or to overdoping of first conductivity type, when the gain or sensitivity of the lateral component is to be reduced, and to second conductivity type doping, when the gain or sensitivity of the lateral component is to be increased. Also claimed are (i) a lateral transistor or thyristor formed in the front face of a lightly doped first conductivity type semiconductor, a second conductivity type layer being provided on the back face of the wafer; and (ii) a p-n junction diode assembly formed in the front face of a lightly doped first conductivity type semiconductor wafer, the back face of the substrate including a heavily doped first conductivity type region.

公开(公告)号：DE69732725D1

公开(公告)日：2005-04-21

申请号：DE69732725

申请日：1997-01-17

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC

IPC: H01L29/74 ,  H01L21/332 ,  H01L21/822 ,  H01L27/02 ,  H01L27/04 ,  H01L29/747

Abstract: The device includes a doped semiconductor substrate, forming two thyristors (Th1,Th2) along its length, one thyristor (Th1) to trigger the anode and the other (Th2) to trigger the cathode. The top (M1-1,M1-2) and bottom (M3,M4) of the substrate have metallisation layers, with the lower metallisation layer being continuous and connected to a reference. An avalanche diode (Z1) is formed in an area between the two metallisations. One side of the upper doped substrate thyristor region is connected to each metallisation area and then to one side of the telephone line (A). The other side of each substrate thyristor region is connected to the second telephone wire (B) via further metallisation layers. The two thyristor areas are mutually separated laterally by a central diffusion region (11), with one thyristor (Th2) being tripped by trigger current or by direct turnover. The turnover voltage is approximately equal to the avalanche voltage of the diode.

公开(公告)号：DE69730761D1

公开(公告)日：2004-10-28

申请号：DE69730761

申请日：1997-01-24

Applicant: ST MICROELECTRONICS SA

Inventor： BERNIER ERIC ,  SIMONNET JEAN-MICHEL

IPC: H01L21/336 ,  H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01L29/735 ,  H01L29/74 ,  H01L29/78 ,  H01L29/861

Abstract: A method of regulating the gain or sensitivity of a lateral component, formed in the upper surface of a first conductivity type semiconductor wafer (N1), involves subjecting the back face to no doping or to overdoping of first conductivity type, when the gain or sensitivity of the lateral component is to be reduced, and to second conductivity type doping, when the gain or sensitivity of the lateral component is to be increased. Also claimed are (i) a lateral transistor or thyristor formed in the front face of a lightly doped first conductivity type semiconductor, a second conductivity type layer being provided on the back face of the wafer; and (ii) a p-n junction diode assembly formed in the front face of a lightly doped first conductivity type semiconductor wafer, the back face of the substrate including a heavily doped first conductivity type region.

公开(公告)号：DE69728937D1

公开(公告)日：2004-06-09

申请号：DE69728937

申请日：1997-07-24

Applicant: ST MICROELECTRONICS SA

Inventor： PEZZANI ROBERT ,  BERNIER ERIC

IPC: H01L29/73 ,  H01L21/331 ,  H01L27/06 ,  H01L29/732 ,  H01L29/74 ,  H01L29/744

Abstract: The structure includes an isolation wall (6) of a first conductivity type,formed in a semiconductor wafer (1) of a second conductivity type, separating a first portion of the wafer containing a high voltage thyristor with a layer corresponding to the wafer thickness, from a second portion containing logic circuit elements. The back face is uniformly coated with a metallisation layer (M1) in contact with the portions of the wafer. The thyristor is produced in lateral form, the isolation wall being in electrical contact with a control region of the same conductivity type as the thyristor and the logic portion includes a vertical component (20) with a main contact corresponding to the back face metallisation.