公开(公告)号：FR2803140A1

公开(公告)日：2001-06-29

申请号：FR9916491

申请日：1999-12-24

Applicant: ST MICROELECTRONICS SA

Inventor： GONTHIER LAURENT ,  DESTOUCHES MICKAEL ,  JALADE JEAN

IPC: H03K17/16 ,  H03K17/30 ,  H03K3/35

Abstract: The generator comprises a first component (11) of Schottky diode type for the activation of rising front of pulse at the output node (17), and a second component (12') of thyristor type for blocking the first component and deactivating the pulse at the end of a predetermined delay which follows the activation of pulse. The generator also comprises a resistance-capacitance cell (R1, C1) between the input node (14) and the first component (11) for a pre-adjustment of the instant of appearance of the rising front of pulse, a resistor (R2) connected between the first component and the output node, and a resistor (R3) connected in parallel to the second component. The first component (11) is constituted by an element of thyristor type (11-1) and an element of Zener diode type (11-2) connected between the trigger and the anode. In the first embodiment, the second component is a thyristor with cathodic trigger, which is connected by the intermediary of a Zener diode to a capacitor node. In the second embodiment, the second component is a thyristor (12') with anodic trigger, which is connected to a sense node (20) of a component (2) of MOS transistor or IGBT type; a diode (D') and a Zener diode (18') are connected by between the anodic trigger and the sense node (20). A circuit for the control of a load power-fed by a high ac. voltage, eg. grid, comprises at least one power interrupter with di/dt control containing a parallel connection of a component of MOS transistor or IGBT type and a thyristor-type component, and at least one voltage pulse generator for the control of closing of transistor-type component, and at least one voltage pulse generator for the control of closing of transistor-type component. In the case of control circuit comprising two power interrupters, they are connected in series and opposition, and each is associated with one half-cycle of ac. voltage.

公开(公告)号：FR2803140B1

公开(公告)日：2002-05-31

申请号：FR9916491

申请日：1999-12-24

Applicant: ST MICROELECTRONICS SA

Inventor： GONTHIER LAURENT ,  DESTOUCHES MICKAEL ,  JALADE JEAN

IPC: H03K17/16 ,  H03K17/30 ,  H03K3/35

Abstract: The generator comprises a first component (11) of Schottky diode type for the activation of rising front of pulse at the output node (17), and a second component (12') of thyristor type for blocking the first component and deactivating the pulse at the end of a predetermined delay which follows the activation of pulse. The generator also comprises a resistance-capacitance cell (R1, C1) between the input node (14) and the first component (11) for a pre-adjustment of the instant of appearance of the rising front of pulse, a resistor (R2) connected between the first component and the output node, and a resistor (R3) connected in parallel to the second component. The first component (11) is constituted by an element of thyristor type (11-1) and an element of Zener diode type (11-2) connected between the trigger and the anode. In the first embodiment, the second component is a thyristor with cathodic trigger, which is connected by the intermediary of a Zener diode to a capacitor node. In the second embodiment, the second component is a thyristor (12') with anodic trigger, which is connected to a sense node (20) of a component (2) of MOS transistor or IGBT type; a diode (D') and a Zener diode (18') are connected by between the anodic trigger and the sense node (20). A circuit for the control of a load power-fed by a high ac. voltage, eg. grid, comprises at least one power interrupter with di/dt control containing a parallel connection of a component of MOS transistor or IGBT type and a thyristor-type component, and at least one voltage pulse generator for the control of closing of transistor-type component, and at least one voltage pulse generator for the control of closing of transistor-type component. In the case of control circuit comprising two power interrupters, they are connected in series and opposition, and each is associated with one half-cycle of ac. voltage.

公开(公告)号：FR2816127A1

公开(公告)日：2002-05-03

申请号：FR0014005

申请日：2000-10-31

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  LAUR JEAN PIERRE ,  SANCHEZ JEAN LOUIS ,  AUSTIN PATRICK ,  BREIL MARIE ,  BERNIER ERIC

IPC: H02M1/08 ,  H02M5/257 ,  H01F38/00

Abstract: The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made of ferromagnetic material. At each current alternation of the network, the interrogation of the magnetic state of the strand results in the presence, or not, of a control signal on the power device (Sw).

公开(公告)号：FR2788166B1

公开(公告)日：2001-03-09

申请号：FR9816771

申请日：1998-12-31

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  SANCHEZ JEAN LOUIS ,  LAUR JEAN PIERRE ,  BREIL MARIE ,  AUSTIN PATRICK ,  BERNIER ERIC ,  ROY MATHIEU

IPC: H01L29/74 ,  H01L21/822 ,  H01L27/04 ,  H01L27/06 ,  H01L29/739 ,  H01L29/78 ,  H01L27/07 ,  H02M1/00 ,  H03K17/567

公开(公告)号：DE69938814D1

公开(公告)日：2008-07-10

申请号：DE69938814

申请日：1999-12-28

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  SANCHEZ JEAN-LOUIS ,  LAUR JEAN-PIERRE ,  BREIL MARIE ,  AUSTIN PATRICK ,  BERNIER ERIC ,  ROY MATHIEU

IPC: H01L27/06 ,  H01L29/74 ,  H01L21/822 ,  H01L27/04 ,  H01L29/739 ,  H01L29/78

公开(公告)号：DE69715746T2

公开(公告)日：2003-05-22

申请号：DE69715746

申请日：1997-07-09

Applicant: ST MICROELECTRONICS SA

Inventor： QUOIRIN JEAN-BAPTISTE ,  JALADE JEAN ,  SANCHEZ JEAN-LOUIS ,  LAUR JEAN-PIERRE

IPC: H02H3/02 ,  H02H9/02 ,  H01L27/06

Abstract: Three interconnected transistors are used to limit or cut off current flowing between terminals (A,K). A first transistor (NMOSD1) has it's collector connected to the first terminal (A) and it's base to the second terminal (K). A second complementary transistor (PMOSD) is connected to terminal (K) and the first transistor's emitter. The base of the second transistor is connected to the emitter of a third transistor (NMOSD2) and the third transistor has it's collector connected to terminal (A) and it's base connected to terminal (K). A Zener diode is connected between the emitter and base of the third transistor.

公开(公告)号：FR2816127B1

公开(公告)日：2003-04-04

申请号：FR0014005

申请日：2000-10-31

Applicant: ST MICROELECTRONICS SA

Inventor： JALADE JEAN ,  LAUR JEAN PIERRE ,  SANCHEZ JEAN LOUIS ,  AUSTIN PATRICK ,  BREIL MARIE ,  BERNIER ERIC

IPC: H02M1/08 ,  H02M5/257 ,  H01F38/00

Abstract: The invention concerns the control of thyristor-type semiconductor power components (Sw) powered by an alternating current network (VS). The control signal is a pulse (Ie). It is stored in the form of magnetic induction (B), positive or negative, in a core (T) made of ferromagnetic material. At each current alternation of the network, the interrogation of the magnetic state of the strand results in the presence, or not, of a control signal on the power device (Sw).

公开(公告)号：DE69715746D1

公开(公告)日：2002-10-31

申请号：DE69715746

申请日：1997-07-09

Applicant: ST MICROELECTRONICS SA

Inventor： QUOIRIN JEAN-BAPTISTE ,  JALADE JEAN ,  SANCHEZ JEAN-LOUIS ,  LAUR JEAN-PIERRE

IPC: H02H3/02 ,  H02H9/02 ,  H01L27/06

Abstract: Three interconnected transistors are used to limit or cut off current flowing between terminals (A,K). A first transistor (NMOSD1) has it's collector connected to the first terminal (A) and it's base to the second terminal (K). A second complementary transistor (PMOSD) is connected to terminal (K) and the first transistor's emitter. The base of the second transistor is connected to the emitter of a third transistor (NMOSD2) and the third transistor has it's collector connected to terminal (A) and it's base connected to terminal (K). A Zener diode is connected between the emitter and base of the third transistor.

公开(公告)号：DE69425397T2

公开(公告)日：2001-03-01

申请号：DE69425397

申请日：1994-05-09

Applicant: ST MICROELECTRONICS SA

Inventor： AYELA CHRISTOPHE ,  LETURCO PHILIPPE ,  JALADE JEAN ,  SANCHEZ JEAN-LOUIS

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L29/739 ,  H01L29/78 ,  H01L29/86 ,  H02H9/02

Abstract: The present invention relates to a current limiting dipole component, comprising a substrate (11) with a first type of conductivity; separate wells (21, 22) with the second type of conductivity; a first annular region (34) with the first type of conductivity in each well; a second annular region (38) with the first type of conductivity having a low doping level between the periphery of each first annular region and the periphery of each well; an insulating layer (42) on the second annular region and the flush surfaces of the substrate; a first metallisation (44) over the upper surface of the component; and a second metallisation over the lower surface of the component.

公开(公告)号：DE69425397D1

公开(公告)日：2000-09-07

申请号：DE69425397

申请日：1994-05-09

Applicant: ST MICROELECTRONICS SA

Inventor： AYELA CHRISTOPHE ,  LETURCO PHILIPPE ,  JALADE JEAN ,  SANCHEZ JEAN-LOUIS

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L29/739 ,  H01L29/78 ,  H01L29/86 ,  H02H9/02

Abstract: The present invention relates to a current limiting dipole component, comprising a substrate (11) with a first type of conductivity; separate wells (21, 22) with the second type of conductivity; a first annular region (34) with the first type of conductivity in each well; a second annular region (38) with the first type of conductivity having a low doping level between the periphery of each first annular region and the periphery of each well; an insulating layer (42) on the second annular region and the flush surfaces of the substrate; a first metallisation (44) over the upper surface of the component; and a second metallisation over the lower surface of the component.