公开(公告)号：DE60136026D1

公开(公告)日：2008-11-20

申请号：DE60136026

申请日：2001-03-29

Applicant: NXP BV ,  ST MICROELECTRONICS SA

Inventor： DE COSTER WALTER ,  LUNENBORG MEINDERT ,  INARD ALAIN ,  GUELEN JOS

IPC: H01L21/76 ,  H01L29/10 ,  H01L21/265 ,  H01L21/266 ,  H01L21/336 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/08 ,  H01L29/78

Abstract: A method of forming an active area surrounded with an insulating area in a semiconductor substrate, including the steps of forming in the substrate a trench surrounding an active area; filling the trench with an insulating material to form an edge extending beyond the substrate surface at the periphery of the active area; forming a spacer at the periphery of said edge; and implanting a dopant, whereby the implantation in the area located under the spacer is less deep than in the rest of the active area.

公开(公告)号：FR2910715A1

公开(公告)日：2008-06-27

申请号：FR0655813

申请日：2006-12-21

Applicant: ST MICROELECTRONICS SA

Inventor： SANCHEZ YANNICK ,  HOTELLIER NICOLAS ,  INARD ALAIN

IPC: H01L31/18 ,  G02B3/00 ,  H01L27/146 ,  H01L31/0232

Abstract: Procédé et appareillage pour réaliser des micro-lentilles optiques (5) sur une couche antérieure (3) d'un dispositif semi-conducteur, dans lequel on dépose une ultime couche en un matériau adapté ; on réalise des rainures croisées dans ladite couche ultime, jusqu'à ladite couche antérieure, de façon à constituer des plots espacés ; et on effectue un traitement de façon à provoquer un ramollissement desdits plots générant un fluage de ces derniers leur conférant une forme bombée et on provoque leur durcissement, dans lesquels, pour effectuer ledit traitement, on place le dispositif semi-conducteur dans la chambre d'une enceinte, à une température basse ; et on fait fonctionner des moyens de chauffage de ladite chambre, des moyens pour générer un rayonnement ultra-violet vers lesdits plots et des moyens pour générer dans ladite chambre un plasma de façon que, lors dudit fluage et dudit durcissement, les bords voisins desdits plots ne fusionnent pas.Dispositif semi-conducteur à micro-lentilles optiques comprenant des moyens anti-fusion (7) de ces micro-lentilles.

公开(公告)号：FR2806834B1

公开(公告)日：2003-09-12

申请号：FR0003793

申请日：2000-03-24

Applicant: ST MICROELECTRONICS SA

Inventor： INARD ALAIN ,  ZULIAN DOMINIQUE ,  LEVY DIDIER ,  LUNENBORG MEINDERT ,  DE COSTER WALTER ,  OBERLIN JEAN CLAUDE

IPC: H01L21/76 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/78 ,  H01L21/8234

Abstract: Forming an insulating region (14) surrounding an active region (12) in a semiconductor substrate (10) involves forming a trench surrounding the active region in the substrate, filling the trench with a first material so as to create a protruding insulating zone that forms a peripheral edge around the active region, and beveling the edge of insulating region at the periphery of the active region. An Independent claim is given for a semiconductor device comprising a semiconductor substrate (10) and at least one insulating region (14) surrounding an active region (12) which is formed by the invented process.

公开(公告)号：FR2806834A1

公开(公告)日：2001-09-28

申请号：FR0003793

申请日：2000-03-24

Applicant: ST MICROELECTRONICS SA

Inventor： INARD ALAIN ,  ZULIAN DOMINIQUE ,  LEVY DIDIER ,  LUNENBORG MEINDERT ,  DE COSTER WALTER ,  OBERLIN JEAN CLAUDE

IPC: H01L21/76 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/78 ,  H01L21/8234

Abstract: Forming an insulating region (14) surrounding an active region (12) in a semiconductor substrate (10) involves forming a trench surrounding the active region in the substrate, filling the trench with a first material so as to create a protruding insulating zone that forms a peripheral edge around the active region, and beveling the edge of insulating region at the periphery of the active region. An Independent claim is given for a semiconductor device comprising a semiconductor substrate (10) and at least one insulating region (14) surrounding an active region (12) which is formed by the invented process.

公开(公告)号：FR2792113A1

公开(公告)日：2000-10-13

申请号：FR9904269

申请日：1999-04-06

Applicant: ST MICROELECTRONICS SA

Inventor： DE COSTER WALTER ,  INARD ALAIN

IPC: H01L21/762 ,  H01L29/786

Abstract: Method comprises formation of set of layers on substrate (1) including insulating layer (20) and stop layer with remaining portions (31), stage of formation of block of insulating material (MI) in trench (7) including etching of set of layers, formation of trench in substrate by etching, filling of trench with insulating material, and finishing stage. Finishing stage includes, prior to the formation of the gate oxide (OXG) on the active zone of transistor, the stages of surface oxide removal reducing the height of the block of insulating material formed in the trench. The etching of the set of layers includes a lateral etching of the stop layer along perimeter of the opening of the trench (7) to a lateral distance (d) chosen with respect to the height reduction in the finishing stage so that the block of insulating material filling the trench does not have a depression with respect to the level of gate oxide, or that the level of localised depression is less than 10 nm in depth. The block of insulating material (MI) does not extend to the active zone, or extends to the active zone to a distance less than 15 nm. The lateral distance (d) of etching can be equal to 10 nm, and not greater than 40 nm. The lateral etching of the stop layer formed of eg. silicon nitride, is carried out after the trench etching and before the filling of trench. A layer of material with remaining portions (40), of different material as eg. tetraethylorthosilicate (TEOS), is deposited on the stop layer, and the etching of the set of layers is anisotropic with use of a resin mask deposited on the upper layer. An opening of the resin mask corresponds to the opening of trench, and the lateral etching is isotropic with use of preliminary etched upper layer as a mask. The upper layer with remaining portions (40) is removed before the filling of trench. The insulating layer with remaining portions (20) is formed of eg. silicon dioxide.