公开(公告)号：FR2798195A1

公开(公告)日：2001-03-09

申请号：FR9911142

申请日：1999-09-02

Applicant: ST MICROELECTRONICS SA

Inventor： DUTARTRE DIDIER ,  OBERLIN JEAN CLAUDE

IPC: G01N23/20 ,  H01L21/20

Abstract: The x-ray diffraction spectrum of the structure is measured. The diffraction spectra of a monocrystalline silicon substrate, and a monocrystalline silicon substrate completely covered with a layer of monocrystalline SiGe, are simulated. Simulated spectra are added, assigning weights (a) and (1-a), to obtain a summed spectrum. The summed spectrum is compared with the measured spectrum. Simulation parameters and weighting (a) are adjusted, to reduce the difference between summed, and measured spectra.

公开(公告)号：FR2781603B1

公开(公告)日：2000-10-06

申请号：FR9809437

申请日：1998-07-21

Applicant: ST MICROELECTRONICS SA

Inventor： GRIS YVON ,  TROILLARD GERMAINE ,  MOURIER JOCELYNE ,  GUELEN JOS ,  LUNARDI GENEVIEVE ,  BANVILLET HENRI ,  OBERLIN JEAN CLAUDE ,  MADDALON CATHERINE

IPC: H01L21/302 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/768 ,  H01L21/822 ,  H01L27/04 ,  H01L21/3205 ,  H01L21/8234

Abstract: Process involves depositing and etching metal layer for region (12) corresponding to a capacitance plate and area (13) contacting a higher layer; depositing insulating layer; forming hole above the plate, depositing thin insulating layer; forming 2nd hole above contact zone; depositing 2nd metal layer; etching 2nd metal layer except in hole-filling regions; and depositing 3rd metal layer (31, 32). The 1st and 2nd metal layers are tungsten, and the 3rd metal layer is Al-Cu. The 1st hole has inclined walls, while the 2nd hole has straight walls.

公开(公告)号：FR2797999A1

公开(公告)日：2001-03-02

申请号：FR9911139

申请日：1999-08-31

Applicant: ST MICROELECTRONICS SA

Inventor： DELPECH PHILIPPE ,  OBERLIN JEAN CLAUDE

IPC: H01L21/02 ,  H01L21/3105 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01G4/08 ,  H01L21/3065

Abstract: Integral capacitor manufacture on silicon substrate, involves depositing first and second electrodes and an intermediate dielectric layer. Before depositing the second electrode layer, the dielectric layer (2) undergoes exposure to plasma (5), generated in vacuum, under conditions of duration, energy and plasma density selected to avoid impairment of the dielectric layer.

公开(公告)号：FR2781603A1

公开(公告)日：2000-01-28

申请号：FR9809437

申请日：1998-07-21

Applicant: ST MICROELECTRONICS SA

Inventor： GRIS YVON ,  TROILLARD GERMAINE ,  MOURIER JOCELYNE ,  GUELEN JOS ,  LUNARDI GENEVIEVE ,  BANVILLET HENRI ,  OBERLIN JEAN CLAUDE ,  MADDALON CATHERINE

IPC: H01L21/302 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/768 ,  H01L21/822 ,  H01L27/04 ,  H01L21/3205 ,  H01L21/8234

Abstract: Process involves depositing and etching metal layer for region (12) corresponding to a capacitance plate and area (13) contacting a higher layer; depositing insulating layer; forming hole above the plate, depositing thin insulating layer; forming 2nd hole above contact zone; depositing 2nd metal layer; etching 2nd metal layer except in hole-filling regions; and depositing 3rd metal layer (31, 32). The 1st and 2nd metal layers are tungsten, and the 3rd metal layer is Al-Cu. The 1st hole has inclined walls, while the 2nd hole has straight walls.

公开(公告)号：FR2806834B1

公开(公告)日：2003-09-12

申请号：FR0003793

申请日：2000-03-24

Applicant: ST MICROELECTRONICS SA

Inventor： INARD ALAIN ,  ZULIAN DOMINIQUE ,  LEVY DIDIER ,  LUNENBORG MEINDERT ,  DE COSTER WALTER ,  OBERLIN JEAN CLAUDE

IPC: H01L21/76 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/78 ,  H01L21/8234

Abstract: Forming an insulating region (14) surrounding an active region (12) in a semiconductor substrate (10) involves forming a trench surrounding the active region in the substrate, filling the trench with a first material so as to create a protruding insulating zone that forms a peripheral edge around the active region, and beveling the edge of insulating region at the periphery of the active region. An Independent claim is given for a semiconductor device comprising a semiconductor substrate (10) and at least one insulating region (14) surrounding an active region (12) which is formed by the invented process.

公开(公告)号：FR2797999B1

公开(公告)日：2003-08-08

申请号：FR9911139

申请日：1999-08-31

Applicant: ST MICROELECTRONICS SA

Inventor： DELPECH PHILIPPE ,  OBERLIN JEAN CLAUDE

IPC: H01L21/02 ,  H01L21/3105 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01G4/08 ,  H01L21/3065

公开(公告)号：FR2798195B1

公开(公告)日：2001-11-16

申请号：FR9911142

申请日：1999-09-02

Applicant: ST MICROELECTRONICS SA

Inventor： DUTARTRE DIDIER ,  OBERLIN JEAN CLAUDE

IPC: G01N23/20 ,  H01L21/20

公开(公告)号：FR2806834A1

公开(公告)日：2001-09-28

申请号：FR0003793

申请日：2000-03-24

Applicant: ST MICROELECTRONICS SA

Inventor： INARD ALAIN ,  ZULIAN DOMINIQUE ,  LEVY DIDIER ,  LUNENBORG MEINDERT ,  DE COSTER WALTER ,  OBERLIN JEAN CLAUDE

IPC: H01L21/76 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/762 ,  H01L21/8242 ,  H01L27/08 ,  H01L27/108 ,  H01L29/78 ,  H01L21/8234

Abstract: Forming an insulating region (14) surrounding an active region (12) in a semiconductor substrate (10) involves forming a trench surrounding the active region in the substrate, filling the trench with a first material so as to create a protruding insulating zone that forms a peripheral edge around the active region, and beveling the edge of insulating region at the periphery of the active region. An Independent claim is given for a semiconductor device comprising a semiconductor substrate (10) and at least one insulating region (14) surrounding an active region (12) which is formed by the invented process.