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公开(公告)号:DE60127148D1
公开(公告)日:2007-04-19
申请号:DE60127148
申请日:2001-12-28
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE , CORONA PIETRO
IPC: H01L21/762
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公开(公告)号:DE60032772D1
公开(公告)日:2007-02-15
申请号:DE60032772
申请日:2000-09-27
Applicant: ST MICROELECTRONICS SRL
Inventor: BARLOCCHI GABRIELE , VILLA FLAVIO
Abstract: Integrated microreactor, formed in a monolithic body (50) and including a semiconductor material region (2, 23) and an insulating layer (25, 30); a buried channel (21) extending in the semiconductor material region; a first and a second access trench (40a, 40b) extending in the semiconductor material region (2, 23) and in the insulating layer (25, 30), and in communication with the buried channel (21); a first and a second reservoir (41a, 41b) formed on top of the insulating layer (25, 30) and in communication with the first and the second access trench; a suspended diaphragm (45) formed by the insulating layer (25, 30), laterally to the buried channel (21); and a detection electrode (28), supported by the suspended diaphragm (45), above the insulating layer (25, 30), and inside the second reservoir.
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公开(公告)号:DE60023464D1
公开(公告)日:2005-12-01
申请号:DE60023464
申请日:2000-06-05
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , MASTROMATTEO UBALDO , BARLOCCHI GABRIELE , CATTANEO MAURO
Abstract: The microreactor is completely integrated and is formed by a semiconductor body (2) having a surface (4) and housing at least one buried channel (3) accessible from the surface of the semiconductor body (2) through two trenches (21a, 21b). A heating element (10) extends above the surface (4) over the channel (3) and a resist region (18) extends above the heating element and defines an inlet reservoir and an outlet reservoir (19, 20). The reservoirs (19, 20) are connected to the trenches (21a, 21b) and have, in cross-section, a larger area than the trenches. The outlet reservoir (20) has a larger area than the inlet reservoir (19). A sensing electrode (12) extends above the surface (4) and inside the outlet reservoir (20).
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公开(公告)号:DE69826233D1
公开(公告)日:2004-10-21
申请号:DE69826233
申请日:1998-01-13
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/762 , H01L21/00
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公开(公告)号:DE69930099T2
公开(公告)日:2006-08-31
申请号:DE69930099
申请日:1999-04-09
Applicant: ST MICROELECTRONICS SRL
Inventor: BARLOCCHI GABRIELE , VILLA FLAVIO
IPC: H01L21/764 , H01L21/20 , H01L21/306 , H01L21/308 , H01L21/762
Abstract: The method allows formation of buried cavities in a wafer (25) of monocrystalline semiconductor material. Initially, at least one cavity (21) is formed in a substrate (10) of monocrystalline semiconductor material, by timed TMAH etching silicon, then the cavity is covered with a material inhibiting epitaxial growth (22); finally, a monocrystalline epitaxial layer (26) is grown above the substrate (10) and the cavities (21). Thereby, the cavity (21) is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane (52). The original wafer (25) must have a plurality of elongate cavities or channels (21), parallel and adjacent to one another. Trenches (44) are then excavated in the epitaxial layer (26), as far as the channels (21), and the dividers between the channels are removed by timed TMAH etching.
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公开(公告)号:DE69828486D1
公开(公告)日:2005-02-10
申请号:DE69828486
申请日:1998-04-03
Applicant: ST MICROELECTRONICS SRL
Inventor: MONTANINI PIETRO , VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/3065 , H01L21/762
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公开(公告)号:ITTO20010392D0
公开(公告)日:2001-04-23
申请号:ITTO20010392
申请日:2001-04-23
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE , TORCHIA MANLIO GENNARO , MASTROMATTEO UBALDO
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公开(公告)号:DE60127148T2
公开(公告)日:2007-12-13
申请号:DE60127148
申请日:2001-12-28
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE , CORONA PIETRO
IPC: H01L21/762
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公开(公告)号:DE69935495T2
公开(公告)日:2007-11-29
申请号:DE69935495
申请日:1999-04-29
Applicant: ST MICROELECTRONICS SRL
Inventor: BARLOCCHI GABRIELE , VILLA FLAVIO , CORONA PIETRO
IPC: H01L21/764 , B01L3/00 , B81C1/00 , H01L21/20
Abstract: The process comprises the steps of forming, on a monocrystalline-silicon body (11), an etching-aid region (13) of polycrystalline silicon; forming, on the etching-aid region (13), a nucleus region (17) of polycrystalline silicon, surrounded by a protective structure (26) having an opening (22') extending as far as the etching-aid region (13); TMAH-etching the etching-aid region (13) and the monocrystalline body (11), forming a tub shaped cavity (30); removing the top layer (19) of the protective structure (26); and growing an epitaxial layer (33) on the monocrystalline body (11) and the nucleus region (17). The epitaxial layer, of monocrystalline type (33a) on the monocrystalline body (11) and of polycrystalline type (33b) on the nucleus region (17), closes upwardly the etching opening (22'), and the cavity (30) is thus completely embedded in the resulting wafer (34).
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公开(公告)号:DE69937106D1
公开(公告)日:2007-10-25
申请号:DE69937106
申请日:1999-07-09
Applicant: ST MICROELECTRONICS SRL
Inventor: VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/76 , H01L21/762 , H01L21/20 , H01L21/329 , H01L21/763 , H01L27/12
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