-
公开(公告)号：JP2000058802A
公开(公告)日：2000-02-25
申请号：JP674099
申请日：1999-01-13
Applicant: ST MICROELECTRONICS SRL
Inventor： MONTANINI PIETRO , VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/76 , H01L21/3065 , H01L21/762 , H01L27/12
Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of an SOI wafer that can be supplied at low cost. SOLUTION: This manufacturing method of an SOI wafer consists of a process to form a reversed U-shape protection regions 30 made of oxidation resistant material covering first wafer portions 18 on a single crystal semiconductor wafer 1, a process to form deep trenches 16 that extend between the above first wafer portions 18 and demarcate side portions of the first wafer portions 18, a process to completely oxidize the first wafer portions 18 excluding the upper portions 21 covered by the protection regions, a process to form at least one continuous region 22 of a covered oxide that is overlaid with the above unoxidized upper portions 21, and a process to epitaxially grow a crystal semiconductor material layer from the above unoxidized upper portions 21.
-
公开(公告)号：JPH1183418A
公开(公告)日：1999-03-26
申请号：JP14780098
申请日：1998-05-28
Applicant: ST MICROELECTRONICS SRL
Inventor： SAX HERBERT , MURARI BRUNO , VILLA FLAVIO , VIGNA BENEDETTO , FERRARI PAOLO
Abstract: PROBLEM TO BE SOLVED: To provide a two dimensional sensor particularly for car, which comprises a permanent magnet moving while facing plural sensor elements to detect a magnetic field. SOLUTION: A permanent magnet 3 is freely movable on a plane along the first and second directions, which do not coincide with each other, and is fixed to a control lever so as to freely rotate around the third direction perpendicular to the plane as the center. The permanent magnet 3 is freely movable relative to an accumulation device 2 composed of the first group partitioned along the first direction, the second group partitioned along the second direction and a sensor element 10 of the third group to detect an angle position of the permanent magnet 3. An electronic equipment integrated with the sensor unit 10 produces a code relative to a position movement of the permanent magnet 3, and generates a control signal corresponding to a required function.
-
3.发明专利
公开(公告)号：JP2001291839A
公开(公告)日：2001-10-19
申请号：JP2001054817
申请日：2001-02-28
Applicant: ST MICROELECTRONICS SRL
Inventor： ERRATICO PIETRO , SACCHI ENRICO , VILLA FLAVIO , BARLOCCHI GABRIELE , CORONA PIETRO
IPC: H01L21/822 , B81C1/00 , G01N37/00 , H01L21/306 , H01L21/308 , H01L21/314 , H01L21/316 , H01L27/04
Abstract: PROBLEM TO BE SOLVED: To solve the problem that, in forming an embedding cavity within a semiconductor material main body in the prior art, a special mask needed complicates the processes, or increases the cost, or further increas the area where the cavity occupies on silicon. SOLUTION: This process comprises the steps of: forming, on a top part of a semiconductor material wafer, a perforated mask which contains a plurality of openings each having a substantially square shape and a side face having an inclination of 45 deg. with respect to the flat part of the semiconductor material wafer, and has a lattice structure, using the perforated mask to perform anisotropic etching on the semiconductor material wafer in TMAH, thereby forming a cavity having a section of a reverse isosceles trapezoid, and using TEOS to perform a chemical vapor phase growth, thereby forming a TEOS layer which can completely airtightly close the opening of the perforated mask, can define a film coating on the cavity, and can form later a suspended integration structure.
-
公开(公告)号：JPH11142270A
公开(公告)日：1999-05-28
申请号：JP19212398
申请日：1998-07-07
Applicant: ST MICROELECTRONICS SRL
Inventor： FERRARI PAOLO , VIGNA BENEDETTO , VILLA FLAVIO
Abstract: PROBLEM TO BE SOLVED: To provide an integrated piezoresistive pressure sensor having a diaphragm made of a polycrystalline semiconductor material. SOLUTION: This pressure sensor has a semiconductor material singlecrystal substrate 21, a semiconductor material layer 28 on this substrate 21, a gap 55 arranged between the substrate 21 and semiconductor layer 28, and at least one opening part 53 which extends between the reverse outside surface 52 of the substrate 21 and the gap 55. This semiconductor material layer 28 is formed of a polycrystal area 29 forming the diaphragm above the gap 55 and another single-crystal material layer 30. The piezoresistance element 46 extends above the semiconductor layer 28 and is insulated from there at the lateral limit setting edge of the diaphragm 29 by a dielectric layer 45 and mutually connected to form a Wheaston bridge, so pressure applied onto the sensor can be measured from its unbalance.
-
公开(公告)号：JP2001068544A
公开(公告)日：2001-03-16
申请号：JP2000225227
申请日：2000-07-26
Applicant: ST MICROELECTRONICS SRL
Inventor： VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/764 , H01L21/76 , H01L21/762 , H01L27/12
Abstract: PROBLEM TO BE SOLVED: To eliminate defects that the shape of an embedded oxidation region of an SOI wafer has. SOLUTION: A trench is formed in a single-crystal wafer 200 and its internal wall is etched in wet condition to form a cavity 127. After its internal wall is coated with a crystal growth blocking film and a crystal silicon layer 126 is grown on the top surface of the wafer 200, while leaving the cavity 127, a nitride layer 141 is deposited over an oxide layer, the upper part of the cavity is demarcated with a hard mask 142, opened, and thermally oxidized to form an oxide region 127 and a remaining space 128 in the cavity and also form an oxide region 145 even in the opening part. Then polysilicon is deposited over the entire surface of the wafer 200 and the surface is polished to obtain an SOI wafer, having crystal silicon layers 90 and 126 completely inactivated by a continuous buried oxide area 127.
-
Patent Agency Ranking
公开(公告)号：JP2001044399A
公开(公告)日：2001-02-16
申请号：JP2000208131
申请日：2000-07-10
Applicant: ST MICROELECTRONICS SRL
Inventor： VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/76 , H01L21/329 , H01L21/762 , H01L21/763 , H01L27/12
Abstract: PROBLEM TO BE SOLVED: To form simply an integration circuit having various types of elements, containing an element insulated completely from a substrate and an element having a low resistance value in DC conductions. SOLUTION: This manufacturing method comprises the processings of injecting doping impurities at a high concentration into a monocrystal silicon substrate 2, to form a first conductivity-type of planer region 42; opening a groove 10 deeper than a depth of the planar region 42 by selection anisotropic etching oxidizing silicon in the interior of the groove 10 starting from a position at a certain distance from the surface of a substrate, to form a silicon dioxide plaque 22, in which a silicon remaining region doped heavily is mounted and performing epitaxial growth between the silicon remaining regions and thereon to fill the groove, and also re distributing doping impurities in a grown silicon, so that a low characteristic resistive embedding region 42' is formed in a high resistivity epitaxial layer 23.
-
公开(公告)号：JP2000058803A
公开(公告)日：2000-02-25
申请号：JP21892299
申请日：1999-08-02
Applicant: ST MICROELECTRONICS SRL
Inventor： MASTROMATTEO UBALDO , VILLA FLAVIO , BARLOCCHI GABRIELE
IPC: H01L21/316 , H01L21/762 , H01L27/12
Abstract: PROBLEM TO BE SOLVED: To allow a wider range of selections in the dimensional ratio between a trench and a pillar, enable a required crystal quality of an epitaxial layer to be achieved and ensure a continuous embedded oxide layer. SOLUTION: This manufacturing method has a process to perform selective anisotropic etching to form a plurality of trenches 16 that extend from the main surface 3 of a substrate 2 in the substrate 2 and form a plurality of portions therebetween, a process to perform selective anisotropic etching starting at a predetermined distance from the main surface to enlarge the plurality of trenches so that the plurality of portions 18' between adjacent trenches 16 have a reduced thickness, a process to substantially perform selective oxidation starting at the above predetermined distance to convert the plurality of portions of the substrate 2 that were made thinner to silicon dioxide and fill the plurality of trenches 16 with silicon dioxide, and a process to epitaxially grow a silicon layer on the above main surface of the substrate 2.
-
公开(公告)号：JP2000183317A
公开(公告)日：2000-06-30
申请号：JP35098199
申请日：1999-12-10
Applicant: ST MICROELECTRONICS SRL
Inventor： BARLOCCHI GABRIELE , VILLA FLAVIO
IPC: H01L21/301 , H01L21/762 , H01L27/12
Abstract: PROBLEM TO BE SOLVED: To eliminate a crystallographic failure which exists in an epitaxial layer by eliminating a surface region of a first trench side wall locating at a lower position than a first protecting region after graving and punching. SOLUTION: A mask 9 as an anti-oxidizing material is formed on a wafer 1 by defining a first protecting region 7 which covers a first part 8' of the wafer 1. After mutually separating a second part 8" which is not covered by the mask 9 from the first part 8', the second part 8" is graved and punched and a first a first trench 10 which exists by extending between the first part 8' is formed. And after each first trench 10 is defined by a side wall 10a and a bottom wall 10h, a surface region of the side wall 10a of the first trench 10 which locates at a lower position than the first protecting region 7 is eliminated. By the means a crystallographic failure which exists in an epitaxial layer can be eliminated.
-
公开(公告)号：JP2003207612A
公开(公告)日：2003-07-25
申请号：JP2002328479
申请日：2002-11-12
Applicant: ST MICROELECTRONICS SRL
Inventor： MASTROMATTEO UBALDO , CORONA PIETRO , VILLA FLAVIO , BARLOCCHI GABRIELE
Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing reflecting devices for photonics application which has high reflection quality. SOLUTION: The method for manufacturing the electromagnetic radiation reflecting devices (23) comprises the steps of: (a) providing a silicon substrate (1) defined by at least one first free surface (2), (b) forming on the first surface a layer of protective material provided with an opening which exposes a region of the first free surface (2), (c) etching the region of the free surface (2) by means of an anisotropic agent to remove at least one portion of the substrate and defining a second free surface (16) of the substrate inclined in relation to the first surface. Furthermore, the first free surface (2) is parallel to the crystalline planes ä110} of silicon substrate and the step (c) comprises a progressing step of the anisotropic agent so that the second free surface (16) resulting from the etching step is parallel to the planes ä100} of the substrate (1). COPYRIGHT: (C)2003,JPO
-
公开(公告)号：JP2000340775A
公开(公告)日：2000-12-08
申请号：JP2000127858
申请日：2000-04-27
Applicant: ST MICROELECTRONICS SRL
Inventor： VILLA FLAVIO , BARLOCCHI GABRIELE , CORONA PIETRO
IPC: H01L21/316 , H01L21/32 , H01L21/762 , H01L27/12
Abstract: PROBLEM TO BE SOLVED: To optimumly form an embedded oxide film region. SOLUTION: This manufacturing method includes a step of forming a plurality of protruding regions 48 and a trench 45, extending between the protruding regions in a wafer 1, a step for implanting mask regions 55 and 56 with nitrogen ions and the tip of the protruding parts 48, and a step of forming a delay region 57 on the bottom of the trench 45. Nitrogen of the delay region is implanted at a dose lower than a mask region. Thermal oxidization is performed, in such a manner that it starts at the bottom part of the protruding region 48 and progresses downward. The continuous region of an embedded oxide film is formed, and a non-oxidized film region, where a nucleus region is formed for continuous epitaxial growth, is formed on the continuous region corresponding to the tip of the protruding region. The mask regions 55 and 56 and the delay region 57 are formed via two continuous implantations including an oblique implantation.
-
-
-
-
-
-
-
-
-
Search Results
46
records
(took 0.024 seconds)
