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公开(公告)号:DE69231613T2
公开(公告)日:2001-05-31
申请号:DE69231613
申请日:1992-05-22
Applicant: ST MICROELECTRONICS SRL
Inventor: NEBULONI DANIELA , FASSINA ANDREA
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公开(公告)号:DE69329489D1
公开(公告)日:2000-11-02
申请号:DE69329489
申请日:1993-02-24
Applicant: ST MICROELECTRONICS SRL
Inventor: BOTTI EDOARDO , FASSINA ANDREA , FERRARI PAOLO
IPC: H03F1/52
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公开(公告)号:DE60037415T2
公开(公告)日:2008-12-04
申请号:DE60037415
申请日:2000-08-31
Applicant: ST MICROELECTRONICS SRL
Inventor: ADDUCI FRANCESCO , BONA CLAUDIO , FASSINA ANDREA
IPC: H03K3/356 , H03K17/10 , H03K19/003 , H03K19/007
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公开(公告)号:DE69320974T2
公开(公告)日:1999-02-04
申请号:DE69320974
申请日:1993-12-31
Applicant: ST MICROELECTRONICS SRL
Inventor: TAVAZZANI CLAUDIO , FASSINA ANDREA , STEFANI FABRIZIO
Abstract: Circuit for protection of an amplifier stage comprising circuit switching means (G) for turn-off of the stage and piloted through a logic gate OR (F) by a monostable (M), which generates upon arise of abnormal operating conditions turn-off command signals having a predetermined duration. A sensing circuit (B) upon persistence of abnormal conditions at start-up or during normal operation also sends turn-off signals through the logic gate OR (F) after enablement through a gate AND (H). The signals of any enablement at the logic gate AND arrive through a logic gate OR (C) from a window comparator (A) coupled with stage start-up members, from the monostable, and from the output of said logic gate AND (H) as a confirmation signal.
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公开(公告)号:DE69320974D1
公开(公告)日:1998-10-15
申请号:DE69320974
申请日:1993-12-31
Applicant: ST MICROELECTRONICS SRL
Inventor: TAVAZZANI CLAUDIO , FASSINA ANDREA , STEFANI FABRIZIO
Abstract: Circuit for protection of an amplifier stage comprising circuit switching means (G) for turn-off of the stage and piloted through a logic gate OR (F) by a monostable (M), which generates upon arise of abnormal operating conditions turn-off command signals having a predetermined duration. A sensing circuit (B) upon persistence of abnormal conditions at start-up or during normal operation also sends turn-off signals through the logic gate OR (F) after enablement through a gate AND (H). The signals of any enablement at the logic gate AND arrive through a logic gate OR (C) from a window comparator (A) coupled with stage start-up members, from the monostable, and from the output of said logic gate AND (H) as a confirmation signal.
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