公开(公告)号：DE69731089D1

公开(公告)日：2004-11-11

申请号：DE69731089

申请日：1997-10-31

Applicant: ST MICROELECTRONICS SRL

Inventor： DEPETRO RICCARDO ,  MARTIGNONI FABRIZIO ,  SCIAN ENRICO

IPC: H03K17/10 ,  H03K17/687 ,  H03K19/0175 ,  H03K19/0185 ,  H03F1/00

公开(公告)号：DE69731088D1

公开(公告)日：2004-11-11

申请号：DE69731088

申请日：1997-10-31

Applicant: ST MICROELECTRONICS SRL

Inventor： DEPETRO RICCARDO ,  MARTIGNONI FABRIZIO ,  SCIAN ENRICO

IPC: H03K17/10 ,  H03K17/687 ,  H03K19/0175 ,  H03K19/0185 ,  H03F1/00

Abstract: The invention relates to a high-voltage final output stage (1) for driving an electric load, of the type which comprises a complementary pair (3) of transistors connected between first (Vdd) and second (Vss) supply voltage references, and at least one PMOS pull-up transistor (MP1) connected in series with an NMOS pull-down transistor (MN). The stage (1) comprises an additional PMOS transistor (MP2) connected in parallel with the pull-up transistor (MP1) and having the body terminal in common therewith. More particularly, the body terminals of both PMOS transistors (MP1,MP2) are formed in the semiconductor within a common well which can withstand high voltages, and the additional transistor (MP2) is a thick oxide PMOS power transistor.

公开(公告)号：DE69528979D1

公开(公告)日：2003-01-09

申请号：DE69528979

申请日：1995-09-27

Applicant: ST MICROELECTRONICS SRL

Inventor： DIAZZI CLAUDIO ,  TARANTOLA MARIO ,  MARTIGNONI FABRIZIO

IPC: H05B41/295 ,  H05B41/00