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公开(公告)号：ITMI20011996D0
公开(公告)日：2001-09-26
申请号：ITMI20011996
申请日：2001-09-26
Applicant: ST MICROELECTRONICS SRL
Inventor： NESSI MAURIZIO , SCHILLACI LUCA , SCRIVANI ALESSANDRO , SILVESTRI SIMONE
IPC: H03M1/48
Abstract: The present invention herein describes a tracking analog-to-digital converter, in particular of the differential input type. In an embodiment thereof the tracking analog-to-digital converter, having a differential analog input including a first analog input and a second analog input, and a digital output at a first number of bits comprising: a back and forth counter having a direction input and an output, with a second number of bits; a digital-to-analog converter having a data input coupled to said output of said converter, a reference input and an output, with a second number of bits; a first comparator having a positive input, a negative input coupled to said output of said digital-to-analog converter and an output coupled to said direction input; characterized in that said reference input is coupled to said first analog input and said positive input of said first comparator is coupled to said second analog input.
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公开(公告)号：DE60018163D1
公开(公告)日：2005-03-24
申请号：DE60018163
申请日：2000-03-23
Applicant: ST MICROELECTRONICS SRL
Inventor： GALBIATI EZIO , NESSI MAURIZIO , PALESTRA MARCO
IPC: H02M7/5387
Abstract: A feedback control circuit of the current in a load constituted by a winding in series to a current sensing resistor, coupled to a full-bridge output stage, an amplifier (SENSE_AMPL) coupled to the terminals of the sensing resistor, a controller fed with the output of the amplifier and with a voltage reference (VIN) and producing a correction signal, has a PWM converter for generating a pair of control signals (IN+, IN-) that comprises an up/down counter producing a count value and a logic circuitry that produces the complement to two of the correction signal. A pair of registers first (D_IN+) and second (D_IN-) are coupled to the outputs of the controller and of the logic circuitry. A first comparator (COMP_1) coupled to the outputs of the counter and of the first register (D_IN+) produces the first control signal (IN+) if the count signal exceeds the value stored in the first register (D_IN+) and a second comparator (COMP_2) coupled to the counter and to the second register (D_IN-), produces the second control signal (IN-) if the count signal overcomes the value stored in the second register (D_IN-).
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公开(公告)号：ITMI20002176A1
公开(公告)日：2002-04-09
申请号：ITMI20002176
申请日：2000-10-09
Applicant: ST MICROELECTRONICS SRL
Inventor： BRAMBILLA MASSIMILIANO , NESSI MAURIZIO , GALBIATI EZIO
Abstract: A control circuit providing a driving current to a voice coil motor to position a reading and writing head of a disk memory system is described. The circuit comprises a first and a second class AB amplifiers the outputs of which are connected to the terminals of a first resistor in series with the voice coil motor so that a current passes through the voice coil motor and through the first resistor. The circuit comprises a sense amplifier the input terminals of which are coupled with the terminals of said first resistor, a device at the input of which is present a signal which is a sum of an external signal and of an output signal of the sense amplifier. The first amplifier and the second amplifier being driven in inverted phase by an output signal produced by the device. The circuit comprises means for inserting a second resistor in series with the first resistor so that said current passes through the series of said first and said second resistors and so that said sense amplifier has the input terminals coupled with the terminals of said series of resistors.
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公开(公告)号：DE69725977D1
公开(公告)日：2003-12-11
申请号：DE69725977
申请日：1997-08-29
Applicant: ST MICROELECTRONICS SRL
Inventor： ROSSI ANNAMARIA , FUCILI GIONA , CANE MARCELLO , NESSI MAURIZIO
Abstract: A toggle flip-flop (FFT) with reduced integration area, comprising a flip-flop of the D type with an inverting input stage (T,A,B,C) and a master-slave portion. Three transistors (M1,M2,M3) connected to the inverting stage form a logic gate of the XOR type whereto the output terminal (Q) of the master-slave portion is fed back.
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公开(公告)号：IT1318988B1
公开(公告)日：2003-09-19
申请号：ITMI20002176
申请日：2000-10-09
Applicant: ST MICROELECTRONICS SRL
Inventor： BRAMBILLA MASSIMILIANO , NESSI MAURIZIO , GALBIATI EZIO
Abstract: A control circuit providing a driving current to a voice coil motor to position a reading and writing head of a disk memory system is described. The circuit comprises a first and a second class AB amplifiers the outputs of which are connected to the terminals of a first resistor in series with the voice coil motor so that a current passes through the voice coil motor and through the first resistor. The circuit comprises a sense amplifier the input terminals of which are coupled with the terminals of said first resistor, a device at the input of which is present a signal which is a sum of an external signal and of an output signal of the sense amplifier. The first amplifier and the second amplifier being driven in inverted phase by an output signal produced by the device. The circuit comprises means for inserting a second resistor in series with the first resistor so that said current passes through the series of said first and said second resistors and so that said sense amplifier has the input terminals coupled with the terminals of said series of resistors.
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Patent Agency Ranking
公开(公告)号：ITMI20002176D0
公开(公告)日：2000-10-09
申请号：ITMI20002176
申请日：2000-10-09
Applicant: ST MICROELECTRONICS SRL
Inventor： BRAMBILLA MASSIMILIANO , NESSI MAURIZIO , GALBIATI EZIO
Abstract: A control circuit providing a driving current to a voice coil motor to position a reading and writing head of a disk memory system is described. The circuit comprises a first and a second class AB amplifiers the outputs of which are connected to the terminals of a first resistor in series with the voice coil motor so that a current passes through the voice coil motor and through the first resistor. The circuit comprises a sense amplifier the input terminals of which are coupled with the terminals of said first resistor, a device at the input of which is present a signal which is a sum of an external signal and of an output signal of the sense amplifier. The first amplifier and the second amplifier being driven in inverted phase by an output signal produced by the device. The circuit comprises means for inserting a second resistor in series with the first resistor so that said current passes through the series of said first and said second resistors and so that said sense amplifier has the input terminals coupled with the terminals of said series of resistors.
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公开(公告)号：DE69313833D1
公开(公告)日：1997-10-16
申请号：DE69313833
申请日：1993-05-31
Applicant: ST MICROELECTRONICS SRL
Inventor： NESSI MAURIZIO
IPC: H02P6/08 , H03K17/042 , H03K17/16 , H03K17/04
Abstract: A fast-discharge switch (M1) is controlled by a comparator (M2) sensing the voltage difference between the output node and the input node of a driving integrator stage that controls the slew-rate of a power switching output transistor (MP). The fast-discharge switch turns off automatically when the output power transistor reaches (in the case of a MOS transistor) or exits (in the case of a bipolar transistor) saturation. The circuit of the invention accelerates the discharge thus reducing the turn-off delay and is insensitive of load conditions and does not affect the performance of the integrating (driver) stage that control the slew-rate.
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公开(公告)号：IT1392043B1
公开(公告)日：2012-02-09
申请号：ITMI20081632
申请日：2008-09-12
Applicant: ST MICROELECTRONICS SRL
Inventor： NESSI MAURIZIO , SCHILLACI LUCA
IPC: H03F3/45
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公开(公告)号：DE60120907D1
公开(公告)日：2006-08-03
申请号：DE60120907
申请日：2001-03-15
Applicant: ST MICROELECTRONICS SRL
Inventor： SCHILLACI LUCA , NESSI MAURIZIO , GALBIATI EZIO
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公开(公告)号：ITMI20011996A1
公开(公告)日：2003-03-26
申请号：ITMI20011996
申请日：2001-09-26
Applicant: ST MICROELECTRONICS SRL
Inventor： NESSI MAURIZIO , SCHILLACI LUCA , SCRIVANI ALESSANDRO , SILVESTRI SIMONE
IPC: H03M1/48
Abstract: The present invention herein describes a tracking analog-to-digital converter, in particular of the differential input type. In an embodiment thereof the tracking analog-to-digital converter, having a differential analog input including a first analog input and a second analog input, and a digital output at a first number of bits comprising: a back and forth counter having a direction input and an output, with a second number of bits; a digital-to-analog converter having a data input coupled to said output of said converter, a reference input and an output, with a second number of bits; a first comparator having a positive input, a negative input coupled to said output of said digital-to-analog converter and an output coupled to said direction input; characterized in that said reference input is coupled to said first analog input and said positive input of said first comparator is coupled to said second analog input.
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