公开(公告)号：ES2112895T3

公开(公告)日：1998-04-16

申请号：ES92830308

申请日：1992-06-16

Applicant: SGS THOMSON MICROELECTRONICS ,  MAGNETI MARELLI SPA

Inventor： POMA ALBERTO ,  POLETTO VANNI ,  MORELLI MARCO

IPC: H01L27/06 ,  H03F1/52 ,  H03K17/06 ,  H03K17/082 ,  H03K17/08

公开(公告)号：DE60008094D1

公开(公告)日：2004-03-11

申请号：DE60008094

申请日：2000-07-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PERNIGOTTI ELENA ,  POMA ALBERTO ,  PROTTI CARLO

IPC: G01R19/04 ,  H03K5/1532

公开(公告)号：DE60008094T2

公开(公告)日：2004-07-01

申请号：DE60008094

申请日：2000-07-24

Applicant: ST MICROELECTRONICS SRL

Inventor： PERNIGOTTI ELENA ,  POMA ALBERTO ,  PROTTI CARLO

IPC: G01R19/04 ,  H03K5/1532

公开(公告)号：DE69626991T2

公开(公告)日：2004-05-19

申请号：DE69626991

申请日：1996-12-05

Applicant: ST MICROELECTRONICS SRL ,  MAGNETI MARELLI POWERTRAIN SPA

Inventor： MILANESI ANDREA ,  POLETTO VANNI ,  POMA ALBERTO ,  MORELLI MARCO

IPC: G05F1/575

Abstract: A voltage-regulator circuit with a low voltage drop using a DMOS power transistor (PT) driven by a charge pump (CP) comprises two feedback loops: a first feedback loop having high gain and accuracy but low response speed, and a second feedback loop having a wide passband and fast response speed but low gain.

公开(公告)号：ITTO910707D0

公开(公告)日：1991-09-18

申请号：ITTO910707

申请日：1991-09-18

Applicant: ST MICROELECTRONICS SRL ,  MARELLI AUTRONICA ,  SGS THOMSON MICROELECTRONICS

Inventor： POMA ALBERTO ,  POLETTO VANNI ,  MORELLI MARCO

IPC: H03K17/08 ,  H02M1/00 ,  H02M1/38 ,  H03K17/082 ,  H03K17/66

Abstract: The circuit includes two output terminals (OUT1, OUT2) for connection to the terminals of a load (L), first and second pairs of electronic power switches (Q1, Q4; Q2, Q3) which are connected between the output terminals (OUT1, OUT2) and the two poles of a direct-current voltage supply (Vs) so as to form an H-shaped structure with the load (L), and a driver circuit (C1, C2) for selectively making the electronic power switches of the first pair (Q1, Q4) of the second pair (Q2, Q3) order to cause a current to flow through the load (L) in one direction or the other respectively, and for preventing the electronic switches (Q1, Q3; Q2, Q4) which are connected between the same output terminal (OUT1; OUT2) and the two poles of the voltage supply (Vs) from conducting simultaneously.

公开(公告)号：ES2194091T3

公开(公告)日：2003-11-16

申请号：ES96830610

申请日：1996-12-05

Applicant: ST MICROELECTRONICS SRL ,  MAGNETI MARELLI POWERTRAIN SPA

Inventor： MILANESI ANDREA ,  POLETTO VANNI ,  POMA ALBERTO ,  MORELLI MARCO

IPC: G05F1/575

Abstract: A voltage-regulator circuit with a low voltage drop using a DMOS power transistor (PT) driven by a charge pump (CP) comprises two feedback loops: a first feedback loop having high gain and accuracy but low response speed, and a second feedback loop having a wide passband and fast response speed but low gain.

公开(公告)号：DE69626991D1

公开(公告)日：2003-04-30

申请号：DE69626991

申请日：1996-12-05

Applicant: ST MICROELECTRONICS SRL ,  MAGNETI MARELLI POWERTRAIN SPA

Inventor： MILANESI ANDREA ,  POLETTO VANNI ,  POMA ALBERTO ,  MORELLI MARCO

IPC: G05F1/575

Abstract: A voltage-regulator circuit with a low voltage drop using a DMOS power transistor (PT) driven by a charge pump (CP) comprises two feedback loops: a first feedback loop having high gain and accuracy but low response speed, and a second feedback loop having a wide passband and fast response speed but low gain.

公开(公告)号：IT1251205B

公开(公告)日：1995-05-04

申请号：ITTO910707

申请日：1991-09-18

Applicant: ST MICROELECTRONICS SRL ,  MARELLI AUTRONICA

Inventor： POLETTO VANNI ,  MORELLI MARCO ,  POMA ALBERTO

IPC: H03K17/08 ,  H02M1/00 ,  H02M1/38 ,  H03K17/082 ,  H03K17/66 ,  H03K

Abstract: The circuit includes two output terminals (OUT1, OUT2) for connection to the terminals of a load (L), first and second pairs of electronic power switches (Q1, Q4; Q2, Q3) which are connected between the output terminals (OUT1, OUT2) and the two poles of a direct-current voltage supply (Vs) so as to form an H-shaped structure with the load (L), and a driver circuit (C1, C2) for selectively making the electronic power switches of the first pair (Q1, Q4) of the second pair (Q2, Q3) order to cause a current to flow through the load (L) in one direction or the other respectively, and for preventing the electronic switches (Q1, Q3; Q2, Q4) which are connected between the same output terminal (OUT1; OUT2) and the two poles of the voltage supply (Vs) from conducting simultaneously.