公开(公告)号：EP2273542A2

公开(公告)日：2011-01-12

申请号：EP10183247.5

申请日：2001-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Tiziani, Roberto ,  Passagrilli, Carlo

IPC: H01L21/60 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05083 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A semiconductor electronic device (1) is disclosed, which comprises a die (2) of semiconductor material and a support (3), the die (2) of semiconductor material including an integrated electronic circuit and a plurality of contact pads (6) associated with the electronic circuit and connected electrically to the support (3) by wire leads (4), each contact pad of said plurality of contact pads (6) comprising a lower layer (7) of aluminium or alloys thereof, and an upper layer. Advantageously the upper layer consists of:
a first film (9) of palladium or alloys thereof, overlying the lower layer (7) of aluminium or alloys thereof; and optionally
a second film (10) of gold or alloys thereof, overlying the first film (9) of palladium or alloys thereof.
Moreover, the layer (7) or film (9, 10) are deposited by an electroless chemical process.

Abstract translation: 一种半导体电子设备（1）的光盘游离缺失，其包括半导体材料和载体（2）（3），半导体材料制成，包括上集成电子电路和接触垫多个管芯（2）（6）相关联的 与电子电路和电连接到所述支撑件（3）由引线（4），（6）包含铝或合金的下层（7）它们的接触焊盘，所述多个中的每个接触焊盘，并在上层。 有利的上层组成：钯或合金的第一膜（9）它们的，覆盖在下层（7）的铝或它们的合金; 和任选的金或合金的第二电影（10）它们的，上覆钯或它们的合金的第一膜 - （9）。 更上方，层（7）或薄膜（9，10）是在通过无电解化学工艺沉积。

公开(公告)号：EP1473763A1

公开(公告)日：2004-11-03

申请号：EP03425281.7

申请日：2003-04-30

Applicant: STMicroelectronics S.r.l.

Inventor： Deodato, Claudio ,  Tiziani, Roberto

IPC: H01L21/48 ,  H01L23/495

CPC classification number: H01L21/4842 ,  H01L23/49551 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for manufacturing semiconductor electronic devices (1) comprising the step of:

forming, from a plane metallic foil defining a lie plane, a supporting frame (2) comprising a mount pad (3) for said devices and corresponding leads (4) being short-circuited to said mount pad (3),
characterised in that it comprises the steps of:

downsetting said mount pad (3) on a plane being parallel to said lie plane keeping at least a group of leads (4) on said lie plane and separating by shearing said mount plane (3) from said group of leads (4),
mounting a die on a first surface of said mount pad (3),
forming the electrical connections between said die and said group of leads (4),
encapsulating said frame (2) in a protective package (6) so as to leave the second surface of said mount pad (3), being opposite to said first surface, exposed from said protective package (6).

Abstract translation: 一种用于制造半导体电子器件（1）包括以下步骤的方法：形成，从平面金属箔限定谎言平面支撑框架（2）包括用于所述设备的安装垫（3）和相应的引线（4）是 短路到所述安装垫（3），它DASS包括以下步骤：向下设置所述安装垫（3）上平行于所述的平面平放保持至少一组在所述引线（4）的平放 并通过剪切所述安装平面分离（3）从所述引线的组（4），装入安装在所述已的第一表面垫（3），形成所述的爱和Said引线组之间的电连接（4） 封装所述框架（2）在保护性包（6），以便离开所述的第二表面安装垫（3）具有相反的所述第一表面，从所述保护外壳中暴露出来（6）。

公开(公告)号：EP2306503A2

公开(公告)日：2011-04-06

申请号：EP10183300.2

申请日：2001-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Tiziani, Roberto ,  Passagrilli, Carlo

IPC: H01L21/60 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05083 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A semiconductor electronic device (1) is disclosed, which comprises a die (2) of semiconductor material and a support (3), the die (2) of semiconductor material including an integrated electronic circuit and a plurality of contact pads (6) associated with the electronic circuit and connected electrically to the support (3) by wire leads (4), characterized in that each contact pad of said plurality of contact pads (6) comprising a lower layer (7) of copper, or alloys thereof; and an upper layer. Advantageously, the upper layer consists of:
a first film (9) of palladium or alloys thereof, overlying the lower layer (7) of copper or alloys thereof; and optionally
a second film (10) of gold or alloys thereof, overlying the first film (9) of palladium or alloys thereof.
Moreover, the layer (7) or film (9, 10) are deposited by an electroless chemical process.

Abstract translation: 一种半导体电子设备（1）的光盘游离缺失，其包括半导体材料和载体（2）（3），半导体材料制成，包括上集成电子电路和接触垫多个管芯（2）（6）相关联的 与电子电路和电连接至所述支撑件（3）由引线（4），其特征在于，包括做下层的接触垫，所述多个（6）的每一个接触垫铜，或其合金的（7）; 并在上层。 有利的是，上层的组成：钯或合金的第一膜（9）它们的，覆盖在下层（7）铜或其合金的; 和任选的金或合金的第二电影（10）它们的，上覆钯或它们的合金的第一部电影（9）。 更上方，层（7）或薄膜（9，10）是在通过无电解化学工艺沉积。

公开(公告)号：EP2293325A2

公开(公告)日：2011-03-09

申请号：EP10183262.4

申请日：2001-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Tiziani, Roberto ,  Passagrilli, Carlo

IPC: H01L21/60

CPC classification number: H01L24/05 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05083 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A semiconductor electronic device (1) is disclosed, which comprises a die (2) of semiconductor material and a support (3), the die (2) of semiconductor material including an integrated electronic circuit and a plurality of contact pads (6) associated with the electronic circuit and connected electrically to the support (3) by wire leads (4), each contact pad of said plurality of contact pads (6) comprising a lower layer (7) of aluminium, or alloys thereof and an upper layer. Advantageously the upper layer consists of:
a first film (8) of zinc overlying the lower layer (7) of aluminium or alloys thereof;
a second film (9) of nickel or alloys thereof, overlying the first film (8) of zinc;
a third film of palladium or alloys thereof, overlying the second film (9) of nickel or alloys thereof; and optionally
a fourth film (10) of gold or alloys thereof, overlying the third film of palladium or alloys thereof.
Moreover, the layer (7) or film (8,9, 10) are deposited by an electroless chemical process.

Abstract translation: 一种半导体电子设备（1）的光盘游离缺失，其包括半导体材料和载体（2）（3），半导体材料制成，包括上集成电子电路和接触垫多个管芯（2）（6）相关联的 与电子电路和电连接到所述支撑件（3）由引线（4），（6）含有（7）铝，或它们的合金，并在上层下层的接触垫，所述多个中的每个接触垫。 有利的上层组成：锌覆盖所述下层的第一膜（8）（7）的铝或它们的合金; 镍或合金的第二层膜（9）它们的，覆盖在第一膜（8）锌; 钯或合金的第三膜体，覆镍或其合金的第二层膜（9）; 和任选的金或合金的第四影片（10）其上覆于第三电影钯或它们的合金。 更上方，层（7）或膜（8.9，10）是在通过无电解化学工艺沉积。

公开(公告)号：EP1320129A1

公开(公告)日：2003-06-18

申请号：EP01830768.6

申请日：2001-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Tiziani, Roberto ,  Passagrilli, Carlo

IPC: H01L21/60

CPC classification number: H01L24/05 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05001 ,  H01L2224/05083 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00015

Abstract: A semiconductor electronic device (1) is disclosed, which comprises a die (2) of semiconductor material and a support (3), the die (2) of semiconductor material including an integrated electronic circuit and a plurality of contact pads (6) associated with the electronic circuit and connected electrically to the support (3) by wire leads (4), characterized in that each contact pad of said plurality of contact pads (6) comprises a lower layer (7) of aluminium, copper, or alloys thereof, and an upper layer comprising at least one film (9) of a metal and/or metallic alloy selected from a group comprising nickel, palladium, and alloys thereof, and being deposited by an electroless chemical process.

公开(公告)号：EP0907307A1

公开(公告)日：1999-04-07

申请号：EP97830492.1

申请日：1997-10-03

Applicant: STMicroelectronics S.r.l.

Inventor： Tiziani, Roberto ,  Casati, Paolo ,  Cognetti, Carlo ,  Villa, Claudio Maria

IPC: H05K1/02 ,  H05K7/20 ,  H01L23/367

CPC classification number: H05K1/0204 ,  H01L23/3677 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K2201/10416 ,  H05K2201/10689 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: The present invention relates to a heat sink for surface mount power packages, of the type comprising a conductive element having at least a surface (9) which is in contact with an exposed surface (6) of slug (5) incorporated into an IC power package (1) to be mounted on a printed circuit board (4). The conductive element (8) of the heat sink is formed by a first portion (8a) passing through a hole (7) provided in said printed circuit board (4) and by a second larger portion (8b) abutting against the printed circuit board (4).
A process is also provide for mounting the heat sink (8) on an IC power package (1) and in contact with an exposed slug (5) surface of the package (1) to be mounted on the printed circuit board (4).

Abstract translation: 本发明涉及一种用于表面贴装功率封装的散热器，其类型包括导电元件，该导电元件具有至少一个表面（9），该表面（9）与嵌入IC功率的块状物（5）的暴露表面（6）接触 封装（1）安装在印刷电路板（4）上。 散热器的导电元件（8）由穿过设置在所述印刷电路板（4）中的孔（7）的第一部分（8a）和与所述印刷电路板（4）抵接的第二较大部分（8b）形成 （4）。 还提供一种方法，用于将散热器（8）安装在IC电源封装（1）上并与要安装在印刷电路板（4）上的封装（1）的暴露的块塞（5）表面接触。