公开(公告)号：US10123418B1

公开(公告)日：2018-11-06

申请号：US15903049

申请日：2018-02-23

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Fu-Yang Chen

IPC: H05K1/16 ,  H05K3/10 ,  H05K1/18 ,  H05K1/02 ,  H01F27/06 ,  H05K1/03 ,  H05K3/00 ,  H01F41/04 ,  H05K1/11

Abstract: A circuit board structure including an insulating layer, first and second dielectric layers, and first and second inductors is provided. The insulating layer includes a first surface, a second surface, and a first conductive through hole. The first dielectric layer is disposed on the first surface. The first inductor is disposed on the first surface and includes a first conductive coil in a solenoid form penetrating the first dielectric layer and a first magnetic flux axis of which the direction is substantially parallel to the first surface. The second dielectric layer is disposed on the second surface. The second inductor is disposed on the second surface and includes a second conductive coil in a solenoid form penetrating the second dielectric layer and a second magnetic flux axis of which the direction is substantially parallel to the second surface. A manufacturing method of a circuit board structure is provided.

公开(公告)号：US10950687B2

公开(公告)日：2021-03-16

申请号：US16874691

申请日：2020-05-15

Applicant: Unimicron Technology Corp.

Inventor： Yu-Hua Chen ,  Fu-Yang Chen ,  Chun-Hsien Chien ,  Chien-Chou Chen ,  Wei-Ti Lin

IPC: H01L23/522 ,  H01L23/532 ,  H01L23/15 ,  H01L49/02 ,  H01L23/498

Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.

公开(公告)号：US20210076508A1

公开(公告)日：2021-03-11

申请号：US16950910

申请日：2020-11-18

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Chien-Chou Chen ,  Fu-Yang Chen ,  Ra-Min Tain

IPC: H05K3/46 ,  H05K3/40 ,  H05K3/42 ,  H05K3/28 ,  H05K3/30 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00

Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

公开(公告)号：US10888001B2

公开(公告)日：2021-01-05

申请号：US16244113

申请日：2019-01-10

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Chien-Chou Chen ,  Fu-Yang Chen ,  Ra-Min Tain

IPC: H05K7/10 ,  H05K3/46 ,  H05K3/40 ,  H05K3/42 ,  H05K3/28 ,  H05K3/30 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00

Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

公开(公告)号：US20200273948A1

公开(公告)日：2020-08-27

申请号：US16874691

申请日：2020-05-15

Applicant: Unimicron Technology Corp.

Inventor： Yu-Hua Chen ,  Fu-Yang Chen ,  Chun-Hsien Chien ,  Chien-Chou Chen ,  Wei-Ti Lin

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/498 ,  H01L23/532 ,  H01L23/15

Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.

公开(公告)号：US10700161B2

公开(公告)日：2020-06-30

申请号：US16159726

申请日：2018-10-15

Applicant: Unimicron Technology Corp.

Inventor： Yu-Hua Chen ,  Fu-Yang Chen ,  Chun-Hsien Chien ,  Chien-Chou Chen ,  Wei-Ti Lin

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/498 ,  H01L23/15 ,  H01L23/532

Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure. A substrate structure obtained by the manufacturing method of the substrate structure is provided.