公开(公告)号：US20240414850A1

公开(公告)日：2024-12-12

申请号：US18404845

申请日：2024-01-04

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain ,  Chih-Kai Chan ,  Shih-Lian Cheng

IPC: H05K3/18 ,  H05K1/09 ,  H05K1/11 ,  H05K3/00 ,  H05K3/02 ,  H05K3/34

Abstract: A circuit board structure includes a core layer, at least one electroplating metal layer, at least one dielectric layer and at least one conductive metal layer. The core layer includes at least one dielectric portion and at least one metal portion. The electroplating metal layer is disposed on at least one of a first surface and a second surface of the core layer, exposing a portion of at least one of the first surface and the second surface and at least connecting the at least one metal part. The dielectric layer is disposed on at least one of the first surface and the second surface and on the electroplating metal layer. The dielectric layer has at least one opening exposing a portion of the electroplating metal layer. The conductive metal layer is disposed in the opening of the dielectric layer and is correspondingly connected to the electroplating metal layer.

公开(公告)号：US20230335466A1

公开(公告)日：2023-10-19

申请号：US18337438

申请日：2023-06-20

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain ,  Chih-Kai Chan ,  Jun-Ho Chen

IPC: H01L23/48 ,  H01L23/66 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

CPC classification number: H01L23/481 ,  H01L23/66 ,  H05K1/189 ,  H05K3/4691 ,  H05K3/4697 ,  H05K1/0216 ,  H01L2223/6677 ,  H05K2201/10098 ,  H05K2201/0154 ,  H05K2201/09809

Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The bottom side of the first circuit structure has at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.

公开(公告)号：US11678441B2

公开(公告)日：2023-06-13

申请号：US16950910

申请日：2020-11-18

Applicant: Unimicron Technology Corp.

Inventor： Wei-Ti Lin ,  Chun-Hsien Chien ,  Chien-Chou Chen ,  Fu-Yang Chen ,  Ra-Min Tain

IPC: H05K3/46 ,  H05K3/40 ,  H05K3/42 ,  H05K3/28 ,  H05K3/30 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00

CPC classification number: H05K3/4644 ,  H05K1/111 ,  H05K1/115 ,  H05K1/181 ,  H05K3/007 ,  H05K3/0097 ,  H05K3/28 ,  H05K3/303 ,  H05K3/4007 ,  H05K3/421 ,  H05K3/429 ,  H05K2201/09136 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K2201/10234 ,  H05K2201/10522

Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

公开(公告)号：US11410933B2

公开(公告)日：2022-08-09

申请号：US17314055

申请日：2021-05-07

Applicant: Unimicron Technology Corp.

Inventor： John Hon-Shing Lau ,  Cheng-Ta Ko ,  Pu-Ju Lin ,  Tzyy-Jang Tseng ,  Ra-Min Tain ,  Kai-Ming Yang

IPC: H01L21/00 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00

Abstract: A package structure, including a bridge, an interposer, a first redistribution structure layer, a second redistribution structure layer, and multiple chips, is provided. The bridge includes a silicon substrate, a redistribution layer, and multiple bridge pads. The interposer includes an intermediate layer, multiple conductive vias, multiple first pads, and multiple second pads. The bridge is embedded in the intermediate layer. The bridge pads are aligned with the upper surface. The first redistribution structure layer is disposed on the upper surface of the interposer and is electrically connected to the first pads and the bridge pads. The second redistribution structure layer is disposed on the lower surface of the interposer and is electrically connected to the second pads. The chips are disposed on the first redistribution structure layer and are electrically connected to the first redistribution structure layer. The chips are electrically connected to each other through the bridge.

公开(公告)号：US20220071000A1

公开(公告)日：2022-03-03

申请号：US17149664

申请日：2021-01-14

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Shao-Chien Lee ,  John Hon-Shing Lau ,  Chen-Hua Cheng ,  Ra-Min Tain

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/40 ,  H05K3/02 ,  H05K3/00

Abstract: The disclosure provides a circuit board structure including at least two sub-circuit boards and at least one connector. Each of the sub-circuit boards includes a plurality of carrier units. The connector is connected between the sub-circuit boards, and a plurality of stress-relaxation gaps are defined between the sub-circuit boards.

公开(公告)号：US10714448B2

公开(公告)日：2020-07-14

申请号：US16203635

申请日：2018-11-29

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Ra-Min Tain

IPC: H01L23/00 ,  H01L23/498

Abstract: A chip module includes a body, a bump, and a first bonding layer. The bump is disposed on the body. The first bonding layer is disposed on the bump. The first bonding layers and the bump are made of the same conductive material and the first bonding layer is porous.

公开(公告)号：US20190296102A1

公开(公告)日：2019-09-26

申请号：US16145130

申请日：2018-09-27

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min Tain ,  Chen-Hua Cheng ,  Chin-Sheng Wang ,  Chung-Chi Huang

IPC: H01L49/02 ,  H01L23/522

Abstract: An embedded component structure including a circuit board, an electronic component, a dielectric layer and a connection circuit layer and a manufacturing method thereof is provided. The circuit board has a through hole and includes a core layer, a first circuit layer, and a second circuit layer. The first circuit layer and the second circuit layer are disposed on the core layer. The through hole penetrates the first circuit layer and the core layer. The electronic component including a plurality of connection pads is disposed within the through hole where the dielectric layer is filled in. The connection circuit layer covers and contacts a first electrical connection surface of the first circuit layer and at least one of a second electrical connection surface of each of the connection pads.

公开(公告)号：US10211139B2

公开(公告)日：2019-02-19

申请号：US15287729

申请日：2016-10-06

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Yu-Hua Chen ,  Ra-Min Tain

IPC: H01L23/498 ,  H01L23/48 ,  H01L25/10 ,  H01L21/48 ,  H01L23/367 ,  H01L23/31 ,  C25D5/02 ,  C25D5/34 ,  C25D5/48 ,  C25D7/12 ,  H05K1/11 ,  H05K3/46 ,  H01L23/36 ,  H05K3/42

Abstract: A chip package structure including a molding compound, a carrier board, a chip, a plurality of conductive pillars and a circuit board is provided. The carrier board includes a substrate and a redistribution layer. The substrate has a first surface and a second surface. The redistribution layer is disposed on the first surface. The chip and the conductive pillars are disposed on the redistribution layer. The molding compound covers the chip, the conductive pillars, and the redistribution layer. The circuit board is connected with the carrier board, wherein the circuit board is disposed on the molding compound, such that the chip is located between the substrate and the circuit board, and the chip and the redistribution layer are electrically connected with the circuit board through the conductive pillars. Heat generated by the chip is transmitted through the substrate from the first surface to the second surface to dissipate.

公开(公告)号：US11631626B2

公开(公告)日：2023-04-18

申请号：US17206108

申请日：2021-03-18

Applicant: Unimicron Technology Corp.

Inventor： Ra-Min Tain ,  Po-Hsiang Wang ,  Chi-Chun Po

IPC: H01L23/06 ,  H01L23/367 ,  H01L23/31 ,  H01L23/373 ,  H01L23/00 ,  H01L25/065

Abstract: A package structure includes a first circuit board, a second circuit board, at least one electronic component, at least one conductive lead, and a molding compound. The first circuit board includes a first circuit layer and a second circuit layer. The second circuit board includes a third circuit layer and a fourth circuit layer. The electronic component is disposed between the first circuit board and the second circuit board. The conductive lead contacts at least one of the second circuit layer and the third circuit layer. The conductive lead has a vertical height, and the vertical height is greater than a vertical distance between the second circuit layer and the third circuit layer. The molding compound covers the first circuit board, the second circuit board, the electronic component, and the conductive lead. The molding compound exposes the first circuit layer and the fourth circuit layer, and the conductive lead extends outside the molding compound.

公开(公告)号：US20220287182A1

公开(公告)日：2022-09-08

申请号：US17826178

申请日：2022-05-27

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng ,  Yu-Hua Chen ,  Chun-Hsien Chien ,  Wen-Liang Yeh ,  Ra-Min Tain

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/46

Abstract: An embedded component structure includes a board, an electronic component, and a dielectric material layer. The board has a through cavity. The board includes an insulating core layer and a conductive member. The insulating core layer has a first surface and a second surface opposite thereto. The through cavity penetrates the insulating core layer. The conductive member extends from a portion of the first surface along a portion of the side wall of the through cavity to a portion of the second surface. The electronic component includes an electrode. The electronic component is disposed in the through cavity. The dielectric material layer is at least filled in the through cavity. The connection circuit layer covers and contacts the conductive member and the electrode. A manufacturing method of an embedded component structure is also provided.