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公开(公告)号：US09370107B2
公开(公告)日：2016-06-14
申请号：US14255971
申请日：2014-04-18
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Wei-Ming Cheng
CPC classification number: H05K13/04 , H05K1/11 , H05K1/114 , H05K1/183 , H05K1/184 , H05K1/186 , H05K3/284 , H05K2201/09072 , H05K2201/10083 , H05K2201/10121 , H05K2201/10151
Abstract: An embedded component structure includes a wiring board, a component and an encapsulant. The wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer. The opening penetrates the wiring board and connects the front side and the reverse side of the wiring board. The interconnection layer is located on the front side of the wiring board and extends toward the opening. The component includes an active surface, a back side opposite to the active side, and a working area located on the active surface. The active surface is connected to the interconnection layer of the wiring board. The encapsulant is filled inside the opening and covers the component, which makes the working area of the component exposed. Besides, a method of the embedded component structure is also provided.
Abstract translation: 嵌入式组件结构包括布线板，部件和密封剂。 布线板具有前侧，与前侧相反的反面，开口和互连层。 开口穿过布线板并连接布线板的正面和背面。 互连层位于布线板的正面，朝向开口部延伸。 该部件包括活动表面，与活动侧相对的后侧以及位于活动表面上的工作区域。 有源表面连接到布线板的互连层。 密封剂填充在开口内部并覆盖部件，这使得部件的工作区域暴露。 此外，还提供了嵌入式组件结构的方法。
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公开(公告)号：US20140239463A1
公开(公告)日：2014-08-28
申请号：US13773647
申请日：2013-02-22
Applicant: UNIMICRON TECHNOLOGY CORP.
Inventor： Tsung-Yuan Chen , Wei-Ming Cheng
IPC: H01L23/60
CPC classification number: H01L23/60 , H01L24/24 , H01L24/82 , H01L24/83 , H01L2224/04105 , H01L2224/18 , H01L2224/19 , H01L2224/2518 , H01L2924/0002 , H01L2924/3511 , H01L2924/00
Abstract: An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.
Abstract translation: 提供了包括核心层，芯片，第一电路层和第二电路层的嵌入式芯片封装结构。 芯层包括第一表面，彼此相对的第二表面和穿过第一表面和第二表面的芯片容器。 芯片设置在芯片容器中。 芯片包括有源表面和突起，突起的顶表面是活性表面的一部分。 第一电路层设置在第一表面上并与芯层和芯片电连接。 第一电路层具有通孔。 芯片的突出部位于通孔内，突出部的顶面露出来接收外部信号。 第二电路层设置在第二表面上并与芯层电连接。
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公开(公告)号：US20180077799A1
公开(公告)日：2018-03-15
申请号：US15822222
申请日：2017-11-27
Applicant: Unimicron Technology Corp.
Inventor： Ming-Hao Wu , Shu-Sheng Chiang , Wei-Ming Cheng
CPC classification number: H05K1/111 , H05K1/0266 , H05K1/0296 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K3/0047 , H05K3/0073 , H05K3/4038 , H05K3/4092 , H05K3/4644 , H05K3/4697 , H05K2201/09036 , H05K2201/094 , H05K2201/09563 , H05K2201/09781 , H05K2203/0376 , H05K2203/163
Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive through hole connecting the first and the second patterned circuit layers. The first build-up circuit structure at least has a cavity and an inner dielectric layer. The inner dielectric layer has an opening communicating the cavity and a pad of the first patterned circuit layer is located in the opening. A hole diameter of the opening is smaller than a hole diameter of cavity. An inner surface of the inner dielectric layer exposed by the cavity and a top surface of the pad are coplanar or have a height difference.
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公开(公告)号：US09324664B2
公开(公告)日：2016-04-26
申请号：US13773647
申请日：2013-02-22
Applicant: Unimicron Technology Corp.
Inventor： Tsung-Yuan Chen , Wei-Ming Cheng
CPC classification number: H01L23/60 , H01L24/24 , H01L24/82 , H01L24/83 , H01L2224/04105 , H01L2224/18 , H01L2224/19 , H01L2224/2518 , H01L2924/0002 , H01L2924/3511 , H01L2924/00
Abstract: An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.
Abstract translation: 提供了包括核心层，芯片，第一电路层和第二电路层的嵌入式芯片封装结构。 芯层包括第一表面，彼此相对的第二表面和穿过第一表面和第二表面的芯片容器。 芯片设置在芯片容器中。 芯片包括有源表面和突起，突起的顶表面是活性表面的一部分。 第一电路层设置在第一表面上并与芯层和芯片电连接。 第一电路层具有通孔。 芯片的突出部位于通孔内，突出部的顶面露出来接收外部信号。 第二电路层设置在第二表面上并与芯层电连接。
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Patent Agency Ranking
公开(公告)号：US08736033B1
公开(公告)日：2014-05-27
申请号：US13798116
申请日：2013-03-13
Applicant: Unimicron Technology Corp.
Inventor： Yu-Chen Chuo , Wei-Ming Cheng
IPC: H01L23/60
CPC classification number: H01L24/19 , H01L23/552 , H01L2224/04105 , H01L2924/3025 , H05K1/0218 , H05K1/185 , H05K3/4602 , H05K2201/0715
Abstract: An embedded-electronic-device package includes a core layer, an electronic device, a first dielectric layer, a second dielectric layer, a shielding-metal layer and conductive vias. The core layer includes a first surface, a second surface opposite to the second surface and a cavity penetrating the core layer. The electronic device is disposed in the cavity including an inner surface. The first dielectric layer disposed on the first surface is filled in part of the cavity and covers part of the electronic device. The second dielectric layer disposed on the second surface is filled in rest of the cavity, covers rest of the electronic device. The first and second dielectric layers cover the electronic device. The shielding-metal layer covers the inner surface. The conductive vias are respectively disposed in the first and second dielectric layers and extended respectively from outer surfaces of the first and second dielectric layers to the shielding-metal layer.
Abstract translation: 嵌入式电子器件封装包括芯层，电子器件，第一介电层，第二介电层，屏蔽金属层和导电通孔。 芯层包括第一表面，与第二表面相对的第二表面和穿透核心层的空腔。 电子设备设置在包括内表面的空腔中。 布置在第一表面上的第一介电层填充在空腔的一部分中并覆盖电子设备的一部分。 设置在第二表面上的第二介电层填充在空腔的其余部分中，覆盖电子设备的其余部分。 第一和第二电介质层覆盖电子器件。 屏蔽金属层覆盖内表面。 导电通孔分别设置在第一和第二电介质层中，分别从第一和第二电介质层的外表面延伸到屏蔽金属层。
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公开(公告)号：US20130040071A1
公开(公告)日：2013-02-14
申请号：US13653423
申请日：2012-10-17
Applicant: UNIMICRON TECHNOLOGY CORP.
Inventor： Cheng-Po Yu , Chi-Min Chang , Wei-Ming Cheng
CPC classification number: H05K3/185 , H05K3/0032 , H05K3/107 , H05K3/465 , H05K3/4661 , H05K2201/0236
Abstract: A method for fabricating a circuit board is provided. A non-conductive material layer is provided on a core substrate, wherein the non-conductive material layer comprises a dielectric material and catalytic particles. A recessed circuit structure is then formed in the non-conductive material layer with a laser beam. Simultaneously, the catalytic particles in the recessed circuit structure are activated with aid of the laser. A buried conductive structure is then formed in the recessed circuit structure by chemical copper deposition methods.
Abstract translation: 提供一种制造电路板的方法。 非导电材料层设置在芯基板上，其中非导电材料层包括电介质材料和催化颗粒。 然后在非导电材料层中用激光束形成凹陷的电路结构。 同时，凹陷电路结构中的催化颗粒借助于激光器被激活。 然后通过化学铜沉积方法在凹陷电路结构中形成掩埋导电结构。
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公开(公告)号：US09913418B2
公开(公告)日：2018-03-06
申请号：US15152564
申请日：2016-05-12
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Wei-Ming Cheng
CPC classification number: H05K13/04 , H05K1/11 , H05K1/114 , H05K1/183 , H05K1/184 , H05K1/186 , H05K3/284 , H05K2201/09072 , H05K2201/10083 , H05K2201/10121 , H05K2201/10151
Abstract: A wiring board is provided, wherein electrical function of the wiring board is normal, the wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer, the opening penetrates the wiring board and connects the front side and the reverse side, and the interconnection layer is located on the front side and extends toward the opening. A component is bonded to the wiring board, wherein electrical function of the component is normal, the component has an active surface, a back surface opposite to the active surface, and a working area located on the active surface, the active surface is bonded to the interconnection layer, the component is located in the opening, and the active surface and the front side of the wiring board face in a same direction. An encapsulant is filled into the opening, so as to cover the component and expose the working area.
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公开(公告)号：US20160255751A1
公开(公告)日：2016-09-01
申请号：US15152564
申请日：2016-05-12
Applicant: Unimicron Technology Corp.
Inventor： Tzyy-Jang Tseng , Wei-Ming Cheng
CPC classification number: H05K13/04 , H05K1/11 , H05K1/114 , H05K1/183 , H05K1/184 , H05K1/186 , H05K3/284 , H05K2201/09072 , H05K2201/10083 , H05K2201/10121 , H05K2201/10151
Abstract: A wiring board is provided, wherein electrical function of the wiring board is normal, the wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer, the opening penetrates the wiring board and connects the front side and the reverse side, and the interconnection layer is located on the front side and extends toward the opening. A component is bonded to the wiring board, wherein electrical function of the component is normal, the component has an active surface, a back surface opposite to the active surface, and a working area located on the active surface, the active surface is bonded to the interconnection layer, the component is located in the opening, and the active surface and the front side of the wiring board face in a same direction. An encapsulant is filled into the opening, so as to cover the component and expose the working area.
Abstract translation: 提供一种布线板，其中布线板的电气功能正常，布线板具有正面，与正面相反的背面，开口和互连层，开口穿透布线板并连接前面 侧面和背面，并且互连层位于前侧并且朝向开口延伸。 部件被接合到布线板上，其中部件的电功能是正常的，部件具有活性表面，与有效表面相对的后表面以及位于活性表面上的工作区域，活性表面被粘合到 互连层，部件位于开口中，并且布线板的有源面和正面朝向相同的方向。 将密封剂填充到开口中，以覆盖部件并暴露工作区域。
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公开(公告)号：US09320143B2
公开(公告)日：2016-04-19
申请号：US13845325
申请日：2013-03-18
Applicant: UNIMICRON TECHNOLOGY CORP.
Inventor： Cheng-Ming Weng , Wei-Ming Cheng , Han-Pei Huang
CPC classification number: H05K1/115 , H05K3/0032 , H05K3/42 , H05K3/426 , H05K2201/09563 , H05K2201/09709 , H05K2201/09836 , H05K2201/09854 , H05K2203/1476 , H05K2203/1572 , Y10T29/49165
Abstract: A wiring board includes a substrate, a first conductor layer, a second conductor layer, and a through-via conductor. The substrate has a first surface, a second surface, and at least one through-via. The first conductor layer is formed on the first surface, and the second conductor layer is formed on the second surface. The through-via conductor is formed in the through-via for electrically connecting to the first conductor layer and the second conductor layer. The through-via has a first depressed portion exposed in the first surface, a second depressed portion exposed in the second surface, and a tunnel portion between the first depressed portion and the second depressed portion for connecting the first depressed portion and the second depressed portion. The first depressed portion and the second depressed, portion are non-coaxial.
Abstract translation: 布线基板包括基板，第一导体层，第二导体层和通孔导体。 衬底具有第一表面，第二表面和至少一个通孔。 第一导体层形成在第一表面上，第二导体层形成在第二表面上。 通孔导体形成在用于电连接到第一导体层和第二导体层的通孔中。 通孔具有暴露在第一表面中的第一凹陷部分，暴露在第二表面中的第二凹部，以及在第一凹陷部分和第二凹陷部分之间的用于连接第一凹陷部分和第二凹陷部分的隧道部分 。 第一凹陷部分和第二凹陷部分是非同轴的。
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