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    CAPACITOR STRUCTURE IN AN INTEGRATED CIRCUIT
    11.
    发明公开
    CAPACITOR STRUCTURE IN AN INTEGRATED CIRCUIT 审中-公开
    集成电路中的电容器结构

    公开(公告)号：EP3180809A1

    公开(公告)日：2017-06-21

    申请号：EP15750888.8

    申请日：2015-08-05

    Applicant: Xilinx, Inc.

    Inventor： JING, Jing ,  WU, Shuxian

    IPC: H01L49/02 ,  H01L23/522

    CPC classification number: H01L27/0805 ,  H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In an example, a capacitor (120) in an integrated circuit (IC) (100), includes: a first finger capacitor (104a) formed in at least one layer (M6-M8) of the IC having a first bus (202a) and a second bus (204a); a second finger capacitor (104b) formed in the at least one layer of the IC having a first bus (202b) and a second bus (204b), where a longitudinal edge (230L) of the second bus of the second finger capacitor is adjacent a longitudinal edge (228R) of the first bus of the first finger capacitor and separated by a dielectric gap (118-1 ); and a first metal segment (214-1 ) formed on a first layer (M9) above the at least one layer, the first metal segment being electrically coupled to the first bus of the first finger capacitor and increasing a width and a height of the first bus of the first finger capacitor.

    Abstract translation: 在一个示例中，集成电路（IC）中的电容器包括：第一指状电容器，形成在具有第一总线和第二总线的IC的至少一层中; 形成在具有第一总线和第二总线的IC的至少一层中的第二指状电容器，其中第二指状电容器的第二总线的纵向边缘与第一指状电容器的第一总线的纵向边缘相邻 并通过介电间隙分开; 以及形成在所述至少一个层上方的第一层上的第一金属段，所述第一金属段电耦合到所述第一指状电容器的第一总线并且增加所述第一指状电容器的第一总线的宽度和高度。

    SUBSTRATE NOISE ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES
    14.
    发明公开
    SUBSTRATE NOISE ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：EP3501039A1

    公开(公告)日：2019-06-26

    申请号：EP17765322.7

    申请日：2017-08-29

    Applicant: Xilinx, Inc.

    Inventor： JING, Jing ,  WU, Shuxian ,  SOWARDS, Jane, W.

    IPC: H01L21/761 ,  H01L21/8234

    Abstract: An example a semiconductor device includes a first circuit and a second circuit formed in a semiconductor substrate. The semiconductor device further includes a first guard structure formed in the semiconductor substrate and disposed between the first circuit and the second circuit, the first guard structure including first discontinuous pairs of n+ and p+ diffusions disposed along a first axis. The semiconductor device further includes a second guard structure formed in the semiconductor substrate and disposed between the first circuit and the second circuit, the second guard structure including second discontinuous pairs of n+ and p+ diffusions disposed along the first axis, the second discontinuous pairs of n+ and p+ diffusions being staggered with respect to the first discontinuous pairs of n+ and p+ diffusions.

    SYMMETRICAL CENTER TAP INDUCTOR STRUCTURE
    17.
    发明公开
    SYMMETRICAL CENTER TAP INDUCTOR STRUCTURE 有权
    INDUKTORSTRUKTUR MIT EINEM SYMMETRISCHEN ZENTRUM

    公开(公告)号：EP2689456A1

    公开(公告)日：2014-01-29

    申请号：EP12702345.5

    申请日：2012-01-12

    Applicant: Xilinx, Inc.

    Inventor： WU, Zhaoyin, D. ,  JIANG, Xuewen ,  UPADHYAYA, Parag ,  JING, Jing ,  WU, Shuxian

    IPC: H01L23/522

    CPC classification number: H01L23/5227 ,  H01L23/5225 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An inductor structure (105, 500, 900) implemented within a semiconductor integrated circuit (IC) can include a coil (205, 505, 905) of conductive material that includes a center terminal (140, 510, 910) located at a midpoint of a length of the coil. The coil can be symmetrical with respect to a centerline (225, 535, 935) bisecting the center terminal. The coil can include a first differential terminal (210, 515, 915) and a second differential terminal (215, 520, 920). The inductor structure can include a return line (155, 560, 960) of conductive material positioned on the center line. The inductor structure can include an isolation ring (220, 525, 945) surrounding the coil. The inductor structure can include a patterned ground shield comprising a plurality of fingers (935, 1035) implemented within an IC process layer located between the coil (905) and a substrate (955) of the IC. The inductor structure can include an isolation wall (1 150) comprising a high conductive material formed to encompass the coil and the patterned ground shield. The isolation wall can be coupled to one end of each finger of the patterned ground shield.

    Abstract translation: 在半导体集成电路（IC）内实现的电感器结构（105,500,900）可以包括导电材料的线圈（205,505,905），该线圈包括位于中心端的中心端子（140,510,910） 线圈的长度。 线圈可相对于将中心线平分的中心线（225,535,935）对称。 线圈可以包括第一差分端子（210,515,915）和第二差分端子（215,520,920）。 电感器结构可以包括位于中心线上的导电材料的返回线（155,560,960）。 电感器结构可以包括围绕线圈的隔离环（220,525,945）。 电感器结构可以包括图案化的接地屏蔽，其包括在位于线圈（905）和IC的衬底（955）之间的IC处理层内实现的多个指状物（935,1035）。 电感器结构可以包括隔离壁（115），其包括形成为包围线圈和图案化接地屏蔽的高导电材料。 隔离壁可以连接到图案化接地屏蔽的每个手指的一端。

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