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211.发明授权
公开(公告)号：EP1905734B1
公开(公告)日：2009-05-06
申请号：EP07117116.9
申请日：2007-09-25
Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE , STMicroelectronics SA
Inventor： Casset, Fabrice , Durand, Cédric , Ancey, Pascal
CPC classification number: B81C1/0065 , B81B2201/0271 , B81B2207/015 , H03H3/0073 , H03H9/1057 , H03H9/2405 , H03H2009/02496
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公开(公告)号：EP1804376B1
公开(公告)日：2009-04-01
申请号：EP05755248.1
申请日：2005-07-01
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： KUBO, Ryuichi, Murata Manufacturing Co., Ltd. , OGUCHI, Takahiro, Murata Manufacturing Co., Ltd. , YAMADA, Hajime, Murata Manufacturing Co., Ltd.
CPC classification number: H03H9/587 , B81B2201/0271 , B81C1/00238 , H03H9/105 , H03H9/1092 , H03H9/564
Abstract: A piezoelectric filter having a smaller size is provided. A piezoelectric filter (10) includes a first substrate (22) having at least one first piezoelectric resonator (25) disposed on a main surface of the first substrate (22); a second substrate (12) having at least one second piezoelectric resonator (15) disposed on a main surface of the second substrate (12); a connection pattern (20) extending around the first piezoelectric resonator (25) and the second piezoelectric resonator (15) and disposed between the first substrate (22) and the second substrate (12), the main surface of the first substrate (22) facing the main surface of the second substrate (12), the first piezoelectric resonator (25) being bonded to the second piezoelectric resonator (15) with the connection pattern (20), and the first piezoelectric resonator (25) being remote from the second piezoelectric resonator (15), and a connecting layer (24x) for bonding a pad (28x) to a pad (18x), the pad 2(8x) being disposed on the main surface of the first substrate (22) and electrically connected to the first piezoelectric resonator (25), and the pad (18x) being disposed on the main surface of the second substrate (12) and electrically connected to the second piezoelectric resonator (15).
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213.发明公开METHOD OF MAKING A NANOGAP FOR VARIABLE CAPACITIVE ELEMENTS AND DEVICE HAVING A NANOGAP 有权一种用于生产纳米缺口可变电容元件和器件的具有纳米GAP
公开(公告)号：EP1618599A4
公开(公告)日：2009-04-01
申请号：EP04759726
申请日：2004-03-22
Applicant: BOSCH GMBH ROBERT , UNIV LELAND STANFORD JUNIOR
Inventor： PARTRIDGE AARON , LUTZ MARKUS , KENNY THOMAS
CPC classification number: B81C1/00063 , B81B2201/0271 , H01G5/16
Abstract: A method for fabricating a variable capacitive device including providing a base silicon-bearing compound electrode (107a-107c) which is vertically-inclined with respect to a substrate, depositing a sacrificial layer on the base electrode, depositing a silicon-bearing compound electrode (116a-117d) on the sacrificial layer which is also vertically-inclined with respect to the substrate, and removing the sacrificial layer from between the base silicon-bearing compound electrode (107a-107c) and the grown silicon-bearing compound electrode.(116a-116d) A variable capacitive device having a fixed vertically-inclined silicon-bearing compound electrode and a movable vertically-inclined silicon-bearing compound electrode produced by arranging a sacrificial layer on a base silicon-bearing compound electrode, depositing a grown silicon-bearing compound electrode on the sacrificial layer, and etching the sacrificial layer. Between the fixed silicon-bearing compound and the movable silicon-bearing compound electrode is a nanogap (120a-120d), the nanogap having a uniform width.
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公开(公告)号：EP1861926B1
公开(公告)日：2008-12-03
申请号：EP06737666.5
申请日：2006-03-09
Applicant: Honeywell International Inc.
Inventor： JAFRI, Ijaz, H. , MAGENDANZ, Galen, P. , KLEIN, Jonathan, L.
CPC classification number: B81C1/00142 , B81B2201/0271 , B81C2201/019 , B81C2203/036 , B81C2203/051 , H03H3/0072 , H03H9/2447 , H03H9/462 , Y10T29/49005 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49826 , Y10T29/49861
Abstract: A method for fabrication of single crystal silicon micromechanical resonators using a two-wafer process, including either a Silicon-on-insulator (SOI) (104) or insulating base and resonator wafers (108) , wherein resonator anchors (122, 124) , a capacitive air gap (116) , isolation trenches (128, 130) , and alignment marks are micromachined in an active layer (114) of the base wafer; the active layer of the resonator wafer (124) is bonded directly to the active layer of the base wafer; the handle (144) and dielectric layers (140) of the resonator wafer are removed; viewing windows are opened in the active layer of the resonator wafer; masking the single crystal silicon semiconductor material active layer of the resonator wafer with photoresist material; a single crystal silicon resonator is machined in the active layer of the resonator wafer using silicon dry etch micromachining technology; and the photoresist material is subsequently dry stripped.
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215.发明公开Procédé de réalisation d'un composant éléctromécanique sur un substrat plan 有权at at at at at at at at at at at at at at at at at at at at at at at
公开(公告)号：EP1905734A1
公开(公告)日：2008-04-02
申请号：EP07117116.9
申请日：2007-09-25
Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE , STMicroelectronics SA
Inventor： Casset, Fabrice , Durand, Cédric , Ancey, Pascal
CPC classification number: B81C1/0065 , B81B2201/0271 , B81B2207/015 , H03H3/0073 , H03H9/1057 , H03H9/2405 , H03H2009/02496
Abstract: Procédé de réalisation d'un composant électromécanique (10) sur un substrat (15) plan et comportant une structure vibrante (22) dans le plan du substrat et des électrodes d'actionnement (23), comportant les étapes de :
- formation du substrat comportant une zone en silicium (16) recouverte en partie par deux zones isolantes (18),
- formation d'une couche sacrificielle en alliage de silicium / germanium par épitaxie sélective à partir de la partie non recouverte de la zone en silicium,
- formation par épitaxie d'une couche (20) en silicium, fortement dopé, comportant une zone monocristalline (20b) disposée sur ladite couche sacrificielle et deux zones polycristallines (20a) disposées sur les zones isolantes,
- formation simultanée de la structure vibrante et des électrodes d'actionnement, par gravure dans la zone monocristalline d'un motif prédéterminé destiné à former des espaces (24) entre les électrodes et la structure vibrante,
- élimination par gravure sélective de ladite couche sacrificielle.Abstract translation: 该方法包括通过来自平面衬底（15）的上表面的未覆盖部分的选择性外延形成基于锗和硅合金的牺牲层。 通过外延形成在牺牲层上具有单晶区的强掺杂硅层（20）和绝缘区（18）上的多晶区。 通过在单晶区域中雕刻形成激活电极（23）和振动结构（22），并且预设图案在电极和结构之间形成空间。 消除牺牲层。
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Patent Agency Ranking
公开(公告)号：EP1890379A1
公开(公告)日：2008-02-20
申请号：EP06711955.2
申请日：2006-01-19
Applicant: Sony Corporation
Inventor： OSAKA, Tsutomu c/o Sony Corporation , SATO, Susumu
CPC classification number: H03H9/173 , B81B2201/0271 , B81C1/00476 , H01L21/31111 , H03H3/02 , H03H9/02149 , H03H2003/021 , Y10T29/42
Abstract: A method of manufacturing a micromachine in which corrosion of a structure is restrained and the micromachine are provided. The method of manufacturing a micromachine includes a first step of patterningly forming a sacrificial layer 12 having a silicon oxide based material containing a hydrogen fluoride dissociating species on a substrate 11, a second step of forming a structure 16 on the substrate 11 in the state of covering the sacrificial layer 12, a third step of forming the structure 16 on the sacrificial layer 12 with a hole part or parts 18 reaching the sacrificial layer 12, and a fourth step of forming a vibrating space between the substrate 11 and the structure 16 by introducing only a hydrogen fluoride gas or only the hydrogen fluoride gas and an inert gas through the hole part or parts 18 and etching the sacrificial layer 12 by use of the dissociating species contained in the sacrificial layer 12. The micromachine is manufactured by the method.
Abstract translation: 制造其中抑制了结构的腐蚀并且提供微机械的微机械的方法。 微机械的制造方法包括在基板11上图案化地形成具有含有氟化氢解离物质的氧化硅系材料的牺牲层12的第一工序，在基板11上形成结构体16的第二工序 覆盖牺牲层12的第三步骤，在牺牲层12上形成具有到达牺牲层12的孔部分18的结构16的第三步骤，以及在衬底11与结构16之间形成振动空间的第四步骤 仅通过孔部分18仅引入氟化氢气体或仅氟化氢气体和惰性气体，并且通过使用牺牲层12中所含的解离物种蚀刻牺牲层12.微机械通过该方法制造。
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公开(公告)号：EP1637498A1
公开(公告)日：2006-03-22
申请号：EP05108509.0
申请日：2005-09-15
Inventor： ANCEY, Pascal , ABELE, Nicolas , CASSET, Fabrice
CPC classification number: G01P15/124 , B81B3/0035 , B81B2201/0235 , B81B2201/0264 , B81B2201/0271 , B81B2203/0109 , G01L1/005 , G01L9/0098 , H03B5/12 , H03B5/1237 , H03B5/30
Abstract: L'invention concerne un transistor MOS à grille déformable formé dans un substrat semiconducteur, comprenant des zones de source et de drain séparées par une zone de canal s'étendant dans une première direction de la source au drain et dans une deuxième direction perpendiculaire à la première, une poutre conductrice de grille placée au moins au-dessus de la zone de canal s'étendant dans la deuxième direction entre des points d'appui placés sur le substrat de chaque côté de la zone de canal, et tel que la surface de la zone de canal est creuse et a une forme semblable à celle de la poutre de grille lorsque celle-ci est en déflexion maximale vers la zone de canal.
Abstract translation: 一种形成在半导体衬底（10）中的可变形栅极的MOS晶体管包括：（A）一些源极和漏极区域（11,12），其由通道区域（13）分隔开，该沟道区域沿第一方向从源极延伸到漏极 并且在垂直于第一方向的第二方向上; （B）至少设置在所述通道区域的上方的导电栅极梁（16），所述通道区域在所述通道区域的每一侧上位于所述基板上的某些支撑点之间沿所述第二方向延伸。 通道区域的表面是中空的，并且当其处于朝向通道区域的最大偏转时，具有与栅极光束的表面相似的形式。 还包括独立权利要求：（A）并入该晶体管的电路振荡器; （B）具有可变形栅极的该晶体管的制造。
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公开(公告)号：EP1305258B1
公开(公告)日：2006-03-08
申请号：EP01959574.3
申请日：2001-08-04
Applicant: HARRIS CORPORATION
Inventor： NEWTON, Charles , RUMPF, Raymond , GAMLEN, Carol
CPC classification number: B81C1/0015 , B81B2201/0271 , B81C2201/0109 , H01H59/0009 , H01P1/127 , H05K1/092 , H05K3/02 , Y10T29/49117 , Y10T428/24926 , Y10T428/2495
Abstract: A microelectromechanical structure having a ceramic substrate formed from low temperature co-fired ceramic sheets. A low loss photodefinable dielectric planarizing layer is formed over one surface of the ceramic substrate. This layer can be a sacrificial layer or a subsequent sacrificial layer added. A photodefined conductor is printed over the low loss dielectric planarizing layer and formed with the sacrificial layer into a structural circuit component. A switch is formed with a biasing actuator and deflectable member formed over the biasing actuator and moveable into open and closed circuit positions.
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公开(公告)号：EP1428255A1
公开(公告)日：2004-06-16
申请号：EP02798102.6
申请日：2002-08-29
Applicant: Silicon Light Machines
Inventor： BRUNER, Mike
IPC: H01L23/02 , H01L21/302 , H01L21/461
CPC classification number: B81C1/00484 , B81B2201/0271 , B81B2203/0136 , B81C1/00246 , B81C1/00333 , B81C2201/0109 , B81C2201/014 , B81C2203/0136 , B81C2203/0735
Abstract: The current invention provides for encapsulated release structures, intermediates thereof and methods for their fabrication. The multi-layer structure has a capping layer (211) that preferably comprises silicon oxide and/or silicon nitride and which is formed over an etch resistant substrate (203). A patterned device layer (206), preferably comprising silicon nitride, is embedded in a sacrificial material (205, 209), preferably comprising polysilicon, and is disposed between the etch resistant substrate (203) and the capping layer (211). Access trenches or holes (219) are formed into the capping layer (211) and the sacrificial material (205, 209) is selectively etched through the access trenches (219) such that portions of the device layer (206) are released from the sacrificial material (205, 209). The etchant preferably comprises a noble gas fluoride NgF2x (wherein Ng = Xe, Kr or Ar: and where x = 1, 2 or 3). After etching that sacrificial material (205, 209), the access trenches (219) are sealed to encapsulate (241) released portions the device layer (206) between the etch resistant substrate (203) and the capping layer (211). The current invention is particularly useful for fabricating MEMs devices, multiple cavity devices and devices with multiple release features.
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220.发明公开Dispositif à capacité électrique variable intégrée et procédé de réalisation d'un tel dispositif 有权Bauelement mit variablerKapazitätund Verfahren zur Herstellung
公开(公告)号：EP1308972A1
公开(公告)日：2003-05-07
申请号：EP02292538.2
申请日：2002-10-15
Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
Inventor： Delapierre, Gilles
CPC classification number: H01G5/16 , B81B3/007 , B81B2201/0271 , B81B2203/0127
Abstract: La présente invention concerne un dispositif à capacité variable intégrée comprenant au moins une membrane (12) formant au moins une armature mobile et présentant au moins une face principale en regard d'au moins une armature fixe. Conformément à l'invention, la membrane présente au moins une nervure (32) de rigidité se dressant dans une direction perpendiculaire à ladite face principale.
Application à la réalisation de filtres résonnants.Abstract translation: 可变集成容量机构具有形成移动电枢并面向固定电枢（22）的膜（12）。 膜是固体的，刚性肋部分（32）垂直于主面放置。
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