公开(公告)号：EP1885167B1

公开(公告)日：2011-06-08

申请号：EP07111861.6

申请日：2007-07-05

Applicant: NITTO DENKO CORPORATION

Inventor： Ooyabu, Yasunari ,  Ishii, Jun ,  Terada, Naohiro

IPC: H05K1/02

CPC classification number: H05K1/0259 ,  G11B5/486 ,  G11B5/6094 ,  H05K1/056 ,  H05K1/167 ,  H05K3/28 ,  H05K2201/09063 ,  H05K2201/09554 ,  H05K2201/0969

公开(公告)号：EP2040519B1

公开(公告)日：2011-04-06

申请号：EP08169762.5

申请日：2007-06-06

Applicant: Nitto Denko Corporation

Inventor： Ishii, Jun ,  Ooyabu, Yasunari ,  Thaveeprungsriporn, Visit

IPC: H05K1/02 ,  H05K1/05

CPC classification number: H05K1/0259 ,  G11B5/484 ,  G11B5/486 ,  H05K1/056 ,  H05K1/167 ,  H05K2201/09554 ,  Y10T428/1328 ,  Y10T428/1393 ,  Y10T428/256 ,  Y10T428/257

Abstract: A wired circuit board has a metal supporting board (2), an insulating layer (3) formed on the metal supporting board, a conductive pattern (4) formed on the insulating layer and having a pair of wires (9a,9b) arranged in spaced-apart relation, and a semiconductive layer (5) formed on the insulating layer (3) and electrically connected to the metal supporting board (2) and the conductive pattern (4). The conductive pattern has a first region (14) in which a distance (D1) between the pair of wires is small and a second region (15) in which the distance (D2) between the pair of wires is larger than that in the first region. The semiconductive layer (5) is provided in the second region (15).

公开(公告)号：EP1907165A4

公开(公告)日：2009-08-05

申请号：EP06771953

申请日：2006-06-02

Applicant: MOTOROLA INC

Inventor： WALDVOGEL JOHN M ,  MILLER HERMAN J

IPC: B23K31/02 ,  B23K37/04

CPC classification number: B23K1/0016 ,  B23K2201/36 ,  H05K1/0206 ,  H05K1/0271 ,  H05K3/0061 ,  H05K3/305 ,  H05K3/341 ,  H05K3/386 ,  H05K2201/0305 ,  H05K2201/09318 ,  H05K2201/09554 ,  H05K2201/10022 ,  H05K2201/10636 ,  H05K2201/10969 ,  H05K2203/0455 ,  Y02P70/611

Abstract: An electrical circuit apparatus (300) that includes; a substrate (330) having a top side, a ground layer (336), at least one thermal aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate, the adhesive layer having at least one aperture (322) wherein aligning the at least one substrate solder aperture with the at least one adhesive layer aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

Abstract translation: 一种电路装置（300），包括： 具有顶侧，接地层（336），至少一个热孔径（332）和至少一个焊接孔（334）的衬底（330）; 散热器（310）; 和用于将散热器机械地耦合到基板的接地层的粘合剂层（320），所述粘合剂层具有至少一个孔（322），其中将所述至少一个基板焊剂孔与所述至少一个粘合剂层孔对齐使得能够 焊料在散热器和基板的接地层之间的预定区域中润湿。

公开(公告)号：EP2040519A2

公开(公告)日：2009-03-25

申请号：EP08169762.5

申请日：2007-06-06

Applicant: Nitto Denko Corporation

Inventor： Ishii, Jun ,  Ooyabu, Yasunari ,  Thaveeprungsriporn, Visit

IPC: H05K1/02 ,  H05K1/05

CPC classification number: H05K1/0259 ,  G11B5/484 ,  G11B5/486 ,  H05K1/056 ,  H05K1/167 ,  H05K2201/09554 ,  Y10T428/1328 ,  Y10T428/1393 ,  Y10T428/256 ,  Y10T428/257

Abstract: A wired circuit board (1) comprising: a metal supporting board (2); an insulating layer (3) formed on the metal supporting board (2); a conductive pattern (4) formed on the insulating layer (3) and having two pairs of wires (9a,9b;9c,9d) arranged in spaced-apart relation, wherein the conductive pattern (4) comprises a first pair of wires (9a,9b) and a second pair of wires (9c,9d); and a semiconductive layer (5) formed on the insulating layer (3) and electrically connected to the metal supporting board (2) and the conductive pattern (4); characterized in that: a first semiconductive layer (5A) is formed on the first pair of wires (9a,9b); a second semiconductive layer (5B) is formed on the second pair of wires (9c,9d); the first (5A) and second (5B) semiconductive layers are formed independently of each other; and each of the first (5A) and second (5B) semiconductive layers are electrically connected to the metal supporting layer (2).

Abstract translation: 一种布线电路板（1），包括：金属支撑板（2）; 形成在金属支撑板（2）上的绝缘层（3）; 形成在所述绝缘层（3）上并且具有间隔布置的两对导线（9a，9b; 9c，9d）的导电图案（4），其中所述导电图案（4）包括第一对导线 9a，9b）和第二对电线（9c，9d）; 以及形成在所述绝缘层（3）上并电连接到所述金属支撑板（2）和所述导电图案（4）的半导体层（5）。 其特征在于：第一半导体层（5A）形成在第一对导线（9a，9b）上; 在第二对导线（9c，9d）上形成第二半导体层（5B）; 第一（5A）和第二（5B）半导体层彼此独立地形成; 并且第一（5A）和第二（5B）半导电层中的每一个电连接到金属支撑层（2）。

公开(公告)号：EP1907165A1

公开(公告)日：2008-04-09

申请号：EP06771953.4

申请日：2006-06-02

Applicant: Motorola, Inc.

Inventor： WALDVOGEL, John, M. ,  MILLER, Herman, J.

IPC: B23K31/02 ,  B23K37/04

CPC classification number: B23K1/0016 ,  B23K2201/36 ,  H05K1/0206 ,  H05K1/0271 ,  H05K3/0061 ,  H05K3/305 ,  H05K3/341 ,  H05K3/386 ,  H05K2201/0305 ,  H05K2201/09318 ,  H05K2201/09554 ,  H05K2201/10022 ,  H05K2201/10636 ,  H05K2201/10969 ,  H05K2203/0455 ,  Y02P70/611

Abstract: An electrical circuit apparatus (300) that includes; a substrate (330) having a top side, a ground layer (336), at least one thermal aperture (332), and at least one solder aperture (334); a heat sink (310); and an adhesive layer (320) for mechanically coupling the heat sink to the ground layer of the substrate, the adhesive layer having at least one aperture (322) wherein aligning the at least one substrate solder aperture with the at least one adhesive layer aperture enables solder wetting in a predetermined area between the heat sink and the ground layer of the substrate.

公开(公告)号：EP1885167A1

公开(公告)日：2008-02-06

申请号：EP07111861.6

申请日：2007-07-05

Applicant: NITTO DENKO CORPORATION

Inventor： Ooyabu, Yasunari ,  Ishii, Jun ,  Terada, Naohiro

IPC: H05K1/02

CPC classification number: H05K1/0259 ,  G11B5/486 ,  G11B5/6094 ,  H05K1/056 ,  H05K1/167 ,  H05K3/28 ,  H05K2201/09063 ,  H05K2201/09554 ,  H05K2201/0969

Abstract: A wired circuit board (1) includes a wired circuit body portion (2) having a wired circuit, an electrostatic charge removing portion (3) conducted with the wired circuit body portion and having a semiconductive layer (9), and a conduction cut-off portion (4) arranged between the wired circuit body portion and the electrostatic charge removing portion to cut off electrical conduction therebetween.

Abstract translation: 本发明提供一种布线电路基板（1），其具有：具有布线电路的布线电路主体部（2），与该布线电路主体部导通且具有半导体层（9）的静电消除部（3） （4）布置在布线电路体部分和静电消除部分之间以切断它们之间的导电。

公开(公告)号：EP1561368B1

公开(公告)日：2007-10-10

申请号：EP03783214.4

申请日：2003-11-07

Applicant: PPG Industries Ohio, Inc.

Inventor： OLSON, Kevin, C. ,  WANG, Alan, E.

IPC: H05K3/44 ,  H01L21/48

CPC classification number: C09D5/4488 ,  H01L21/481 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/142 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/056 ,  H05K3/0023 ,  H05K3/0032 ,  H05K3/0035 ,  H05K3/388 ,  H05K3/426 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0179 ,  H05K2201/09554 ,  H05K2201/09609 ,  H05K2203/0582 ,  H05K2203/135 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  H01L2924/00

Abstract: Processes for fabricating a multi-layer circuit assembly and a multi-layer circuit assembly fabricated by such processes are provided. The process includes (a) providing a substrate at least one area of which comprises a plurality of vias, these area(s) having a via density of 500 to 10,000 holes/square inch (75 to 1550 holes/square centimeter); (b) applying a dielectric coating onto all exposed surfaces of the substrate to form a conformal coating thereon; and (c) applying a layer of metal to all surfaces of the substrate. Additional processing steps such as circuitization may be included.

公开(公告)号：EP1376778A3

公开(公告)日：2007-01-03

申请号：EP03013007.4

申请日：2003-06-10

Applicant: MOTOROLA, INC.

Inventor： Poglitsch, Lawrence R. ,  Li, Ronald ,  Kang, Alan S. ,  Ringa, Todd ,  Sharkey, Steven G. ,  Cihak, Rick

IPC: H05K1/02 ,  H01R13/658

CPC classification number: H05K3/363 ,  H01R13/58 ,  H01R43/0256 ,  H05K1/0215 ,  H05K1/0271 ,  H05K3/0061 ,  H05K3/4038 ,  H05K3/44 ,  H05K2201/0305 ,  H05K2201/09063 ,  H05K2201/09554

Abstract: A ground connector assembly (20) having a substrate (22) and a ground member (24). The substrate (22) is used to retain an electrical circuit and has a ground region (34), a ground hole (30), and at least one strain relief slot (32). The ground member (24) is attached within the ground hole (30). The ground region (34) surrounds the ground hole (30) and is at least partially interposed between the ground hole (30) and the strain relief slot (32). The ground connector assembly (20) may further include a conductive ring (42), such as a copper ring, surrounding the ground hole (30) and attached to the ground region (34). There is also a method of making the ground connector assembly (20).

公开(公告)号：EP1603158A1

公开(公告)日：2005-12-07

申请号：EP04717227.5

申请日：2004-03-04

Applicant: THE FURUKAWA ELECTRIC CO., LTD.

Inventor： SHIRAI, Takehiro, The Furukawa Electric Co., Ltd. ,  IWASE, Masayuki, The Furukawa Electric Co., Ltd.

IPC: H01L23/50

CPC classification number: G02B6/4201 ,  G02B6/3885 ,  G02B6/4277 ,  G02B6/428 ,  G02B6/4292 ,  H01L23/24 ,  H01L23/49861 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0219 ,  H05K1/056 ,  H05K3/06 ,  H05K3/44 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09754 ,  H05K2201/10121 ,  H05K2203/0323 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A printed wiring board (10) includes a plurality of conductor plates (10a) spaced apart from one another including at least one conductor plate that is used as a lead for electrical connection with an external circuit; an insulating layer (10b) formed on or astride the conductor plates or on and astride the conductor plates; and a plurality of wiring patterns (10d) formed on the insulating layer. At least one of the conductor plates is electrically connected with at least one of the wiring patterns via a via-hole (11a), a method of manufacturing the printed wiring board, and a lead frame package and an optical module that use the printed wiring board.

Abstract translation: 印刷电路板（10）包括彼此间隔开的多个导体板（10a），包括至少一个用作与外部电路电连接的引线的导体板; 绝缘层（10b），其形成在导体板上或跨越导体板上或跨越导体板; 以及形成在所述绝缘层上的多个布线图案（10d）。 导体板中的至少一个通过通孔（11a）至少一个布线图案，制造印刷线路板的方法和引线框架封装以及使用印刷布线的光学模块电连接 板。

公开(公告)号：EP1111975A4

公开(公告)日：2005-10-26

申请号：EP99931469

申请日：1999-07-22

Applicant: TOYO KOHAN CO LTD

Inventor： SAIJO KINJI ,  YOSHIDA KAZUO ,  OHSAWA SHINJI

IPC: H05K3/06 ,  H05K3/20 ,  H05K3/44 ,  H05K3/46

CPC classification number: H05K3/062 ,  H05K3/20 ,  H05K3/44 ,  H05K3/4647 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/09554 ,  H05K2203/0384 ,  H05K2203/0733 ,  Y10S428/901 ,  Y10T428/12903 ,  Y10T428/1291 ,  Y10T428/12931 ,  Y10T428/12944 ,  Y10T428/24917

Abstract: A method of manufacturing a multilayered printed-circuit board and a low-cost clad board. Copper foil layers (19, 24, 33) for forming conductor layers (10, 17, 18) and nickel plating layers (20, 21) for forming etch stop layers (11, 12) are alternately stacked and compressed to form a clad board (34) for a printed-circuit board. The clad board (34) for the printed-circuit board is selectively etched to manufacture a base. External conductor layers (15, 16) are formed on the surface of the base and patterned. The conductor layers (10, 15, 16) are interconnected electrically through conductors blocks (17, 18) formed by etching the copper foil layers (19, 24, 33) and the nickel plating layers (20, 21) to complete the manufacture of multilayered printed-circuit board.

Abstract translation: 在本发明中，其产生用于多层印刷电路板能够被经济地制造，并具有优良性能的包覆板，使用它们的多层印刷电路板及其制造方法，多层印刷电路板是通过形成包层板制造 为通过层叠铜箔19，24，33将被形成为导体层10，17，18和镀镍20，21，它们将被蚀刻停止层，并同时压接二者的多层印刷电路板34， 通过选择性地蚀刻用于多层印刷电路板34包层板，所述基体的表面上形成外导体层15,16，同时使这种图案化和电通过插入柱状导体17之间的导体层10，15，16连接产生一个基 通过蚀刻铜箔19，24，33和镀镍20 18形成，21