公开(公告)号：US20180279481A1

公开(公告)日：2018-09-27

申请号：US15761366

申请日：2017-05-18

Applicant: Isola USA Corp.

Inventor： Michael Gay

IPC: H05K3/02 ,  H05K3/46 ,  H05K3/38

CPC classification number: H05K3/022 ,  H05K1/0242 ,  H05K3/02 ,  H05K3/383 ,  H05K3/385 ,  H05K3/389 ,  H05K3/4611 ,  H05K3/4652 ,  H05K2201/0373 ,  H05K2203/0307

Abstract: Methods for manufacturing electrical circuits on laminates from low profile copper layers where one or more of the circuits have known and reproducible signal losses. The method for manufacturing printed circuit boards (40) comprising the steps of: providing a planar sheet (16) including a planar dielectric material layer having a first planar surface and a second planar surface, and first copper foil sheet (10) having a first planar surface and a second planar surface wherein the first copper foil planar surface is associated with the first dielectric material layer planar surface and wherein the first copper foil sheet first surface and second surface each include a bond enhancement layer (12, 14); and forming a circuit pattern (32, 34, 36) in the first planar copper sheet by removing unnecessary portions of the first planar copper sheet while leaving the circuit pattern copper in place to form an inner layer sheet including a circuit pattern wherein a bond enhancement layer is not applied to the circuit pattern after forming the circuit pattern.

公开(公告)号：US20170188456A1

公开(公告)日：2017-06-29

申请号：US15133352

申请日：2016-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngjin CHO ,  Hyeon Cheol PARK ,  Kwanghee KIM ,  Weonho SHIN ,  Daejin YANG

IPC: H05K1/09 ,  H01L51/52 ,  G06F3/047 ,  H05K1/02

CPC classification number: H05K1/09 ,  G06F3/041 ,  G06F3/047 ,  G06F2203/04102 ,  H01B1/02 ,  H01B1/023 ,  H01B1/026 ,  H01B1/16 ,  H01L51/5206 ,  H01L51/5234 ,  H01L2251/301 ,  H01L2251/5338 ,  H05K1/0274 ,  H05K2201/0108 ,  H05K2201/0323 ,  H05K2201/0338 ,  H05K2201/0373 ,  H05K2201/0379 ,  H05K2201/0391 ,  H05K2201/09681 ,  H05K2201/10128

Abstract: A conductive component including: a substrate, a first layer comprising a plurality of island structures disposed on the substrate, wherein the island structures include graphene; and a second layer disposed on the first layer, wherein the second layer includes a plurality of conductive nanowires. Also, an electronic device including the conductive component.

公开(公告)号：US20150156873A1

公开(公告)日：2015-06-04

申请号：US14554334

申请日：2014-11-26

Applicant: Panasonic Corporation

Inventor： Shingo YOSHIOKA ,  Hiroaki FUJIWARA ,  Hiromitsu TAKASHITA ,  Tsuyoshi TAKEDA

IPC: H05K1/11

CPC classification number: H05K1/111 ,  H01L21/4846 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16237 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/82385 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/3011 ,  H05K3/107 ,  H05K3/184 ,  H05K3/38 ,  H05K2201/0373 ,  H05K2201/0391 ,  H05K2201/09736 ,  H05K2201/2072 ,  H05K2203/0307 ,  H05K2203/0565 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A circuit board includes an electric circuit having a wiring section and a pad section in the surface of an insulating base substrate. The electric circuit is configured such that a conductor is embedded in a circuit recess formed in the surface of the insulating base substrate, and the surface roughness of the conductor is different in the wiring section and the pad section of the electric circuit. In this case, it is preferable that the surface roughness of the conductor in the pad section is greater than the surface roughness of the conductor in the wiring section.

Abstract translation: 电路板包括在绝缘基底的表面上具有布线部分和焊盘部分的电路。 电路被配置为使得导体嵌入形成在基底绝缘体的表面中的电路凹槽中，并且导体的表面粗糙度在电路的布线部分和焊盘部分中是不同的。 在这种情况下，优选的是，焊盘部中的导体的表面粗糙度大于布线部中的导体的表面粗糙度。

公开(公告)号：US20150092379A1

公开(公告)日：2015-04-02

申请号：US14269585

申请日：2014-05-05

Applicant: Mitsubishi Electric Corporation

Inventor： Naoki YOSHIMATSU ,  Masayoshi SHINKAI ,  Taketoshi SHIKANO ,  Daisuke MURATA ,  Nobuyoshi KIMOTO ,  Yuji IMOTO ,  Mikio ISHIHARA

IPC: H05K1/18 ,  H05K3/06 ,  H05K3/20 ,  H05K1/03

CPC classification number: H05K1/18 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/13055 ,  H05K1/0203 ,  H05K1/0306 ,  H05K3/06 ,  H05K3/20 ,  H05K3/284 ,  H05K2201/0373 ,  H05K2201/09036 ,  H05K2203/049 ,  H05K2203/1184 ,  H05K2203/1316 ,  Y10T29/41 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.

Abstract translation: 根据本发明的半导体器件包括陶瓷衬底，布置在陶瓷衬底的表面上的多个电路图案，布置在至少一个电路图案的上表面上的半导体元件和用于密封陶瓷的密封树脂 衬底，多个电路图案和半导体元件，其中在相邻的电路图案的相对侧表面中形成底切部分，底切部分被构造成使得电路图案的上表面的端部 突出在电路图案之外的多于陶瓷基板上的电路图案的下表面的端部，并且底切部分也填充有密封树脂。

公开(公告)号：US20130140702A1

公开(公告)日：2013-06-06

申请号：US13691827

申请日：2012-12-02

Applicant: Micronas GmbH

Inventor： Christoph WILBERTZ ,  Heinz-Peter FRERICHS ,  Tobias KOLLETH

IPC: H01L23/00

CPC classification number: H01L24/01 ,  G01N27/4148 ,  H01L21/563 ,  H01L23/3157 ,  H01L23/3171 ,  H01L23/4828 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/04026 ,  H01L2224/05551 ,  H01L2224/05638 ,  H01L2224/05684 ,  H01L2224/2929 ,  H01L2224/83139 ,  H01L2224/83365 ,  H01L2924/07811 ,  H01L2924/14 ,  H05K3/4007 ,  H05K2201/0373 ,  H01L2924/00014 ,  H01L2924/01014

Abstract: A fastening device is provided that includes a semiconductor body with an integrated circuit, and a dielectric passivation layer formed on the surface of the semiconductor body, and a trace formed underneath the passivation layer, and an oxide layer formed beneath the trace, and a connecting component that forms a frictional connection between a component formed above the passivation layer and the semiconductor body, wherein a formation passing through the passivation layer and the oxide layer and having a bottom surface is formed, and a conductive layer is formed on the bottom surface and the connecting component forms an electrical connection between the conductive layer and the component.

Abstract translation: 提供了一种紧固装置，其包括具有集成电路的半导体本体和形成在半导体主体的表面上的介电钝化层，以及形成在钝化层下面的迹线以及形成在迹线下方的氧化物层，以及连接 在钝化层上形成的部件和半导体本体之间形成摩擦连接的部件，其中形成穿过钝化层和氧化物层并具有底表面的形成在底表面上的导电层， 连接部件在导电层和部件之间形成电连接。

公开(公告)号：US08282416B2

公开(公告)日：2012-10-09

申请号：US13059677

申请日：2008-08-22

Applicant: Toshiyuki Imazu ,  Hitoshi Suzuki

Inventor： Toshiyuki Imazu ,  Hitoshi Suzuki

IPC: H01R13/648

CPC classification number: H01R12/51 ,  H01R12/707 ,  H01R12/714 ,  H01R12/716 ,  H01R12/724 ,  H01R13/50 ,  H01R13/504 ,  H01R2107/00 ,  H05K3/341 ,  H05K2201/0373 ,  H05K2201/10189 ,  H05K2201/10969

Abstract: A reinforcing plate fixed to a connector main body is arranged on a bottom surface of the connector main body to come into surface contact with a surface of a substrate while a plurality of holes is provided on a surface, which contacts the substrate, of the reinforcing plate. When the reinforcing plate is soldered to the substrate, therefore, a solder wraps around not only a peripheral edge of the reinforcing plate but also an edge of each of the holes so that a soldering portion between the reinforcing plate and the substrate can be sufficiently ensured.

Abstract translation: 固定到连接器主体的加强板设置在连接器主体的底表面上以与基板的表面进行表面接触，同时在与基板接触的表面上设置多个孔，该加强板与加强件 盘子。 因此，当加强板焊接到基板上时，焊料不仅包围加强板的周缘，而且还包围每个孔的边缘，使得能够充分地确保加强板和基板之间的焊接部分 。

公开(公告)号：US08198539B2

公开(公告)日：2012-06-12

申请号：US11994896

申请日：2006-07-05

Applicant: Kota Otoshi ,  Eiji Kono ,  Keiji Toh ,  Katsufumi Tanaka ,  Yuichi Furukawa ,  Shinobu Yamauchi ,  Ryoichi Hoshino ,  Nobuhiro Wakabayashi ,  Shintaro Nakagawa

Inventor： Kota Otoshi ,  Eiji Kono ,  Keiji Toh ,  Katsufumi Tanaka ,  Yuichi Furukawa ,  Shinobu Yamauchi ,  Ryoichi Hoshino ,  Nobuhiro Wakabayashi ,  Shintaro Nakagawa

IPC: H05K1/00

CPC classification number: H05K3/0061 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/473 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/341 ,  H05K2201/0373 ,  H05K2201/1028 ,  H05K2203/0405 ,  Y02P70/613 ,  H01L2924/00

Abstract: A heat radiator 1 includes an insulating substrate 3 whose first side serves as a heat-generating-element-mounting side, and a heat sink 5 fixed to a second side of the insulating substrate 3. A metal layer 7 is formed on the second side of the insulating substrate 3 opposite the heat-generating-element-mounting side. A stress relaxation member 4 formed of a high-thermal-conduction material intervenes between the metal layer 7 of the insulating substrate 3 and the heat sink 5 and includes a plate-like body 10 and a plurality of projections 11 formed at intervals on one side of the plate-like body 10. The end faces of the projections 11 of the stress relaxation member 4 are brazed to the metal layer 7, whereas the side of the plate-like body 10 on which the projections 11 are not formed is brazed to the heat sink 5. This heat radiator 1 is low in material cost and exhibits excellent heat radiation performance.

Abstract translation: 散热器1包括第一侧用作发热元件安装侧的绝缘基板3和固定到绝缘基板3的第二侧的散热片5.金属层7形成在第二侧 绝缘基板3与发热元件安装侧相反。 由高导热材料形成的应力松弛部件4介于绝缘基板3的金属层7和散热片5之间，并且包括板状体10和在一侧形成为间隔的多个突起11 板状体10的突起11的端面钎焊到金属层7，而没有形成突起11的板状体10的侧面钎焊到 该散热器1的材料成本低，散热性能优异。

公开(公告)号：US08156647B2

公开(公告)日：2012-04-17

申请号：US12619129

申请日：2009-11-16

Applicant: Yoshinori Takenaka ,  Takeshi Nakamura

Inventor： Yoshinori Takenaka ,  Takeshi Nakamura

IPC: H01K3/10

CPC classification number: H05K3/465 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K2201/0373 ,  H05K2201/0949 ,  H05K2201/09736 ,  H05K2201/10674 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for manufacturing a multilayer printed wiring board includes preparing a first resin insulative material having a first conductive circuit on or in the first resin insulative material, forming a second resin insulative material on the first resin insulative material and the first conductive circuit, forming on a surface of the second resin insulative material a first concave portion to be filled with a conductive material for formation of a second conductive circuit, forming on the surface of the second resin insulative material a pattern having a second concave portion and post portions to be filled with the conductive material for formation of a plane conductor, and filling the conductive material in the first concave portion and the second concave portion such that the second conductive circuit and the plane conductor are formed.

Abstract translation: 一种多层印刷电路板的制造方法，其特征在于，在第一树脂绝缘材料上或第一树脂绝缘材料上制备具有第一导电电路的第一树脂绝缘材料，在第一树脂绝缘材料和第一导电电路上形成第二树脂绝缘材料，形成第 所述第二树脂绝缘材料的表面具有要填充用于形成第二导电电路的导电材料的第一凹部，在所述第二树脂绝缘材料的表面上形成具有第二凹部的图案和待填充的柱部分 用于形成平面导体的导电材料，并且在第一凹部和第二凹部中填充导电材料，使得形成第二导电电路和平面导体。

公开(公告)号：US08105710B2

公开(公告)日：2012-01-31

申请号：US12096668

申请日：2006-12-14

Applicant: Masao Kondou ,  Yasuo Akai ,  Yoshihisa Ikeda ,  Tomoyuki Shose

Inventor： Masao Kondou ,  Yasuo Akai ,  Yoshihisa Ikeda ,  Tomoyuki Shose

IPC: H01M6/12 ,  H01M2/00 ,  H01M2/02 ,  H01M2/04

CPC classification number: H05K3/3426 ,  H01M2/0222 ,  H01M2/10 ,  H01M2/204 ,  H01M2/30 ,  H01M10/052 ,  H05K3/341 ,  H05K2201/0373 ,  H05K2201/09681 ,  Y02P70/613

Abstract: A battery 10A with leads has a low-profile external casing acting 11 as one of a pair of electrode terminals and a closure plate 12 acting as the other of the electrode terminals. The closure plate 12 hermetically seals an opening of the external casing 11 via an insulating gasket. A pair of lead plates 13 and 14 are each welded to a different one of the electrode terminals 11 and 12. One of the lead plates 13 and 14 is secured to a circuit board X. The lead plate 14 that is secured to the circuit board has a net-like structure.

Abstract translation: 具有引线的电池10A具有作为一对电极端子和作为另一个电极端子的封闭板12之一的低外形外壳。 闭合板12通过绝缘垫片密封外壳11的开口。 一对引线板13和14分别焊接到不同的一个电极端子11和12中。一个引线板13和14被固定到电路板X上。引线板14固定到电路板 有网状结构。

公开(公告)号：US08030578B2

公开(公告)日：2011-10-04

申请号：US11496593

申请日：2006-08-01

Applicant: Yoshiyuki Hiroshima

Inventor： Yoshiyuki Hiroshima

IPC: H05K1/11

CPC classification number: H05K3/3442 ,  B23K1/0016 ,  B23K2101/36 ,  H05K2201/0373 ,  H05K2201/10242 ,  H05K2203/1178 ,  Y02P70/613

Abstract: The present invention is an electrode 10 so provided as to be soldered to an electronic component 12 and, when the electronic component 12 is mounted on a substrate 13, soldered to the substrate 13. The electrode 10 includes a column-like electrode body 11 soldered to the electronic component 12 and to the substrate 13. The electrode has grooves as an air discharging device discharging the air 15a in air voids 15 generated within the solder 14 between joint surfaces 11a, 11b of the electrode body 11 and the electronic component 12 or the substrate 13 when the electrode body 11 is soldered to the electronic component 12 or the substrate 13.

Abstract translation: 本发明是一种电极10，其被设置为焊接到电子部件12上，并且当将电子部件12安装在基板13上时焊接到基板13.电极10包括焊接的柱状电极体11 电子部件12和基板13.电极具有作为排气装置的槽，该排气装置在电极体11的接合表面11a，11b和电子部件12之间在焊料14内产生的空气中排出空气15a，或 电极体11被焊接到电子部件12或基板13时的基板13。