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    Method of producing multilayer printed wiring board and multilayer printed wiring board
    242.
    发明申请
    Method of producing multilayer printed wiring board and multilayer printed wiring board 失效
    制造多层印刷线路板和多层印刷线路板的方法

    公开(公告)号：US20020056192A1

    公开(公告)日：2002-05-16

    申请号：US09960919

    申请日：2001-09-25

    Inventor： Tokihito Suwa ,  Atsushi Tanaka ,  Satoshi Tanigawa ,  Hirofumi Fujii ,  Kazunori Mune

    IPC: H05K003/02 ,  H01K003/10

    CPC classification number: H05K3/4644 ,  H05K1/09 ,  H05K3/108 ,  H05K3/388 ,  H05K3/423 ,  H05K3/4602 ,  H05K3/4623 ,  H05K2201/0344 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09563 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

    Abstract: To provide a method of producing a multilayer printed wiring board that can be intended to have low-profile, light-weight and high-density wiring of a printed wiring board, and a multilayer printed wiring board produced by the method of producing a multilayer printed wiring board, the double-sided substrate is produced by the steps of forming an insulating resin layer on a metal foil; of forming a via hole in the insulating resin layer; of forming a first circuit pattern on the insulating resin layer and forming a conductive layer in the via hole, by plating; and of etching the metal foil to form it into a second circuit pattern. The produced double-sided substrate is used as a core substrate for producing multilayer printed wiring board by a laminate-en-bloc or a build-up method.

    Abstract translation: 本发明提供一种制造多层印刷电路板的方法，所述多层印刷电路板可以用于印刷电路板的薄型，重量轻和高密度布线，以及通过制造多层印刷方法制造的多层印刷线路板 通过在金属箔上形成绝缘树脂层的步骤制造双面基板; 在所述绝缘树脂层中形成通孔; 在所述绝缘树脂层上形成第一电路图案，并且在所述通孔中形成导电层，通过电镀; 并蚀刻金属箔以形成第二电路图案。 将生产的双面基板用作通过层叠体或堆积方法制造多层印刷线路板的核心基板。

    Metallized vias with and method of fabrication
    243.
    发明授权
    Metallized vias with and method of fabrication 有权
    金属化通孔和制造方法

    公开(公告)号：US06252304B1

    公开(公告)日：2001-06-26

    申请号：US09221967

    申请日：1998-12-28

    Applicant: Herbert Stanley Cole, Jr. ,  Wolfgang Daum

    Inventor： Herbert Stanley Cole, Jr. ,  Wolfgang Daum

    IPC: H01L2348

    CPC classification number: H01L21/288 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76873 ,  H01L2221/1089 ,  H05K3/388 ,  H05K3/4076 ,  H05K3/422 ,  H05K3/423 ,  H05K3/4644 ,  H05K2201/0344 ,  H05K2201/09563 ,  H05K2203/072

    Abstract: A method includes applying a first seed layer extending over a horizontal surface and via sidewalls of a dielectric material and exposed underlying contact metallization; removing at least some of the first seed layer from the contact metallization and the horizontal surface while leaving a sufficient amount of the first seed layer on the sidewalls as a catalyst for subsequent application of a third seed layer; sputtering a second seed layer over the contact metallization and the horizontal surface; using an electroless solution to react with the first seed layer and apply the third seed layer over the sidewalls; and electroplating an electroplated layer over the second and third seed layers.

    Abstract translation: 一种方法包括施加在水平表面上延伸的第一籽晶层，并通过电介质材料的侧壁和暴露的下接触金属化; 在接触金属化和水平表面上移除至少一些第一种子层，同时在侧壁上留下足够量的第一种子层作为用于随后施加第三种子层的催化剂; 在接触金属化和水平表面上溅射第二种子层; 使用无电溶液与第一种子层反应并将第三种子层施加在侧壁上; 并在第二和第三种子层上电镀电镀层。

    Pretreating solution for electroless plating, electroless plating bath and electroless plating process
    244.
    发明授权
    Pretreating solution for electroless plating, electroless plating bath and electroless plating process 有权
    化学镀，化学镀浴和化学镀工艺的预处理方案

    公开(公告)号：US06174353B1

    公开(公告)日：2001-01-16

    申请号：US09392783

    申请日：1999-09-09

    Applicant: Benzhen Yuan ,  Motoo Asai

    Inventor： Benzhen Yuan ,  Motoo Asai

    IPC: C23C1818

    CPC classification number: H05K3/244 ,  C23C18/1651 ,  C23C18/166 ,  C23C18/1834 ,  H05K3/062 ,  H05K3/108 ,  H05K3/181 ,  H05K3/184 ,  H05K2201/0344 ,  H05K2203/0392 ,  H05K2203/072

    Abstract: As an electroless plating technique capable of surely promoting the plating reaction without Pd substitution reaction and fastening the plating deposition, there are proposed an electroless plating method of subjecting a primary plated film (or metal film) formed on a substrate to a secondary plating (or electroless plating), characterized in that the secondary plating is carried out after a surface potential of the primary plated film is adjusted so as to be more base than such a most base surface potential that a surface current density of the primary plated film is zero in an electroless plating solution for the secondary plating; and a pretreating solution for electroless plating comprising an alkali solution, reducing agent and completing agent; and an electroless plating bath suitable for use in this method.

    Abstract translation: 作为无电解电镀技术，能够确保促进电镀反应而不进行Pd取代反应和紧固电镀沉积，提出了一种无电镀方法，其将形成在基板上的一次镀膜（或金属膜）进行二次电镀（或 化学镀），其特征在于，在将一次镀膜的表面电位调节至比初级镀膜的表面电流密度为零的最基本的表面电位为基准之后进行二次镀覆 用于二次电镀的化学镀溶液; 以及包含碱溶液，还原剂和完成剂的化学镀的预处理溶液; 以及适用于该方法的化学镀浴。

    Method for interconnection of metal layers of the multilayer network of an electronic board, and the resultant board
    246.
    发明授权
    Method for interconnection of metal layers of the multilayer network of an electronic board, and the resultant board 失效
    电子板的多层网络的金属层的互连方法以及所得到的板

    公开(公告)号：US5464653A

    公开(公告)日：1995-11-07

    申请号：US628896

    申请日：1990-12-18

    Applicant: Philippe Chantraine ,  Marta Zorilla

    Inventor： Philippe Chantraine ,  Marta Zorilla

    IPC: H01L21/768 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  B05D5/12

    CPC classification number: H05K3/422 ,  H05K2201/0344 ,  H05K2201/0347 ,  H05K2201/09563 ,  H05K2203/095 ,  H05K3/0055 ,  H05K3/4644

    Abstract: A method for interconnecting a multilayer metal network of an electronic circuit board is provided. In the method, the electronic circuit board is made up of a plurality of superimposed metal layers having an insulating layer disposed therebetween, wherein the material of the insulating layer is substantially inert to a catalytic activation bath and to chemical deposition of metal. A via hole is formed in the board having a first metal layer thereof as its bottom and traversing a second metal layer and using electroless deposition, metal is deposited in the via by growing the metal from the metal layers only.

    Abstract translation: 提供了一种用于互连电子电路板的多层金属网络的方法。 在该方法中，电子电路板由多个重叠的金属层构成，其间具有绝缘层，绝缘层的材料对催化活化浴基本上是惰性的，并且金属的化学沉积。 在其第一金属层作为其底部并穿过第二金属层并且使用无电沉积的基板上形成通孔，仅通过从金属层生长金属而将金属沉积在通孔中。

    Thermally stable dual metal coated laminate products made from polyimide film
    248.
    发明授权
    Thermally stable dual metal coated laminate products made from polyimide film 失效
    由聚酰亚胺膜制成的耐热稳定双金属涂层叠层产品

    公开(公告)号：US4992144A

    公开(公告)日：1991-02-12

    申请号：US413309

    申请日：1989-09-27

    Applicant: Daniel P. Walsh ,  Philip D. Knudsen

    Inventor： Daniel P. Walsh ,  Philip D. Knudsen

    IPC: C23C18/22 ,  H05K3/02 ,  H05K3/18 ,  H05K3/38

    CPC classification number: H05K3/381 ,  C23C18/22 ,  H05K3/181 ,  H05K3/38 ,  H05K2201/0154 ,  H05K2201/0344 ,  H05K2203/122 ,  H05K3/022

    Abstract: Both surfaces of a polyimide sheet are coated with a layer of electroless nickel or cobalt and can also be coated with a thin electroless copper layer on the Ni. or Co. This tenaciously bonded coating is subsequently treated in such a way so as to increase its permeability or porosity without substantially altering its resistive properties. The induced porosity allows water and other volatiles trapped in the dielectric polyimide sheet to be removed while the preserved electrical continuity of the metal layer is sufficient to support electrolytic copper plating which serves the dual purpose of providing a copper thickness useful for the subsequent production of electronic circuitry and preventing the readsorption of water into the dielectric core by permanently sealing or coating the porous metal layer.

    Abstract translation: 聚酰亚胺薄片的两个表面涂覆有一层无电镍或钴，并且还可以在Ni上涂覆薄的无电镀铜层。 或Co.这种顽固粘合的涂层随后以这样的方式进行处理，以增加其渗透性或孔隙率，而基本上不改变其电阻性质。 诱导的孔隙率允许除去电介质聚酰亚胺片中捕获的水和其它挥发物，同时金属层的保持的电连续性足以支持电解铜电镀，其用于提供用于随后生产电子的铜厚度的双重目的 电路并且通过永久地密封或涂覆多孔金属层来防止水再次吸收到介质芯中。

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