RECOGNITION DISTANCE MEASURING EQUIPMENT BETWEEN TAG AND READER

    公开(公告)号:JP2006322915A

    公开(公告)日:2006-11-30

    申请号:JP2005379671

    申请日:2005-12-28

    Abstract: PROBLEM TO BE SOLVED: To provide recognition distance measuring equipment between a tag and a reader. SOLUTION: Recognition distance measuring equipment between a tag and a reader includes an electron wave anechoic chamber configured that at least one or more unit cells, having electromagnetic waves, absorber is provided in line on an inner wall, an electromagnetic wave generator, arranged in the cell of the one side end of the electron wave anechoic chamber to emit electromagnetic waves through an antenna; and an electromagnetic wave measure which measures the electric field strength of the electromagnetic waves, discharged from the electromagnetic wave generator through an electric field probe moving in the electron wave anechoic chamber. Consequently, the accurate electric field strength can be measured from the angle and the distance between the tag and the reader. COPYRIGHT: (C)2007,JPO&INPIT

    METHOD FOR MANUFACTURING MOS TRANSISTOR
    263.
    发明专利

    公开(公告)号:JP2003163224A

    公开(公告)日:2003-06-06

    申请号:JP2002191424

    申请日:2002-06-28

    Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a MOS transistor having shallow source/drain junction regions. SOLUTION: A diffusion source film is formed on a semiconductor substrate 10 where gate patterns 18 are formed and then the same type or different type of impurities are implanted into the diffusion source film several times at different implant angles. As a result, the impurity concentration of the diffusion source film can be nonuniformly controlled so that damage to the crystal structure of the semiconductor substrate 10 does not occur and thus dislocation does not occur. Further, impurities contained in the diffusion source film having a nonuniform impurity concentration are diffused into the semiconductor substrate 10 by a solid phase diffusion method. Thus, the shallow source/drain junction regions composed of LDD regions and highly doped source/drain regions are formed by a self-alignment method. COPYRIGHT: (C)2003,JPO

    OPTICAL SWITCHING METHOD AND SYSTEM THEREFOR
    265.
    发明专利

    公开(公告)号:JP2003110601A

    公开(公告)日:2003-04-11

    申请号:JP2002148322

    申请日:2002-05-22

    Abstract: PROBLEM TO BE SOLVED: To provide a method and system capable of optical packet switching even in the case where optical data to enter to an optical packet switch is not in the form of packet but in the form of continuous data. SOLUTION: The optical switching method includes a step (401) of switching so that the number of input terminal is the same as the number of output terminal, a step (402) of detecting whether or not input terminals into which an optical packet is inputted, a step (403) of switching the optical packet into destination output terminals of the optical packet by the length of the optical packet when the optical packet has been inputted to one of input terminals in the step (402), a step (404) of determining whether or not there is other optical packets received from other input terminals and whose destination output terminal is an output terminal with the number switched at present when there are the input terminals into which the optical packet is not inputted in the steps above, a step (405) of switching the present input terminal to an idle output terminal when the result of the step (404) is YES, and a step (406) of maintaining the switched state of the present input terminal when the result of the step (404) is NO. All the inputted data independently of the packet form can be switched into output terminals without omission.

    FIELD-EFFECT TRANSISTOR
    266.
    发明专利

    公开(公告)号:JP2003101018A

    公开(公告)日:2003-04-04

    申请号:JP2002197871

    申请日:2002-07-05

    Abstract: PROBLEM TO BE SOLVED: To provide a field-effect transistor by utilizing abrupt metal-insulator phase transition. SOLUTION: The transistor is provided with a Mott's insulator 410 which is arranged on a substrate 400 and causes abrupt metal-insulator phase transition when a charged holes flow in; a ferroelectric film 420 which is arranged on the insulator and makes the charged holes flow into the Mott's insulator 410 when a constant voltage is applied; a gate electrode 430 which is arranged on the film and applies constant voltage to the ferroelectric film; a source electrode 440 which is electrically connected to the first surface of the Mott's insulator 410; and a drain electrode 450 which is electrically connected to the second surface of the Mott's insulator 410. The degree of integration and the switching speed of an element can be improved markedly, and appropriate holes for doping can be obtained at a low voltage, even if the film is not made thin largely.

    NANO-PARTICLE OXIDE SOLAR CELL, MANUFACTURING METHOD THEREFOR, SOLAR CELL MODULE USING IT, AND TRANSPARENT CELL WINDOW

    公开(公告)号:JP2002324590A

    公开(公告)日:2002-11-08

    申请号:JP2001365096

    申请日:2001-11-29

    Abstract: PROBLEM TO BE SOLVED: To provide a solar cell, a manufacturing method therefor, a solar cell module using it, and a cell window, where the interval between solar cells is minimized when solar cells are assembled in series or parallel, the power loss is minimized, and the contact between cells is maximized. SOLUTION: The solar cell comprises a first conductive substrate in which a negative electrode is formed in a certain area, deviated to one side, a second conductive substrate in which a positive electrode is formed in a certain area, deviated to the other side, a connecting/sealing means wherein the first conductive substrate and the second conductive substrate are connected together so that the positive electrode faces the negative electrode with a prescribed interval to overlap while a part of peripheral part where no negative electrode or positive electrode is formed does not overlap, to seal a region where the positive electrode faces the negative electrode, a first conductive adhesive formed at a part of the conductive substrate which does not overlap the second conductive substrate, and a second conductive adhesive formed at a part of the second conductive substrate which does not overlap the first conductive substrate.

    SINGLE TRANSISTOR FERROELECTRIC MEMORY AND DRIVING METHOD THEREFOR

    公开(公告)号:JP2002133859A

    公开(公告)日:2002-05-10

    申请号:JP2000403355

    申请日:2000-12-28

    Abstract: PROBLEM TO BE SOLVED: To provide a single transistor ferroelectric memory and a driving method therefor, by which reading/writing is made random. SOLUTION: A word line control part 52 and a source line control line 53 includes a decoder circuit for selecting a specific cell in accordance with an address inputted at the time of reading and writing and are for providing the selected cell with a prescribed voltage, and a reading voltage generating part 51 is for generating lots of reading voltages at the time of reading. A memory cell array is an arrangement of lots of word lines, bit lines, source lines, and ferro-electric transistors, and this memory cell array is provided with lots of well lines which are arranged in parallel to the bit lines and the source lines and form wells common to the columns, and are connected to the source lines of the columns but electrically isolated from the adjacent wells common to the columns.

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