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公开(公告)号：EP0920658A1
公开(公告)日：1999-06-09
申请号：EP98918574.0
申请日：1998-04-22
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： SUSAK, David
CPC classification number: G05F3/30
Abstract: A precision bandgap reference circuit which uses an operational amplifier (34) that has the positive and negative input terminals connected to a diode/resistor combination (52A and 52B) and a diode (50) respectively. The circuit also comprises an output stage (64 and 66) driven by the operational amplifier to be biased with a PTAT current.
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公开(公告)号：EP0915415A3
公开(公告)日：1999-06-09
申请号：EP98119391.5
申请日：1998-10-14
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： Allen, Stephen , Wojewoda, Igor
IPC: G06F9/32
CPC classification number: G06F7/785 , G06F9/321 , G06F9/3814 , G06F9/3867
Abstract: The stack pointer is used for generating the next unutilized location in the stack memory device in order to indicate where a current value in the program counter is to be written. The stack pointer also generates a directly preceding location to the next unutilized location in order to read the last value of the program counter that was written to the stack memory device. The stack pointer will select the next unutilized location in the stack memory device for a write operation and the directly preceding location to the next unutilized location in the stack memory device for a read operation. The stack pointer will further perform either a post increment or post decrement operation on the next unutilized location in the stack memory device after execution of a current instruction.
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263.发明公开Method of forming narrow thermal silicon dioxide side isolation regions in a semiconductor substrate and mos semiconductor devices fabricated by this method 审中-公开一种用于在半导体衬底中产生精细横向热二氧化硅隔离区和由该方法生产过程MOS半导体器件
公开(公告)号：EP0901162A1
公开(公告)日：1999-03-10
申请号：EP98116880.0
申请日：1998-09-07
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： Amand, Roger D. ST. , Deutscher, Neil F. , Ma, Robert P.
IPC: H01L21/762 , H01L21/314 , H01L21/32
CPC classification number: H01L21/76202 , H01L21/3145 , H01L21/32
Abstract: A method is disclosed for forming narrow thermal silicon dioxide side isolation regions in a semiconductor substrate and MOS or CMOS semiconductor devices fabricated by this method. A thin oxynitride lateral diffusion barrier to oxygen is used in conjunction with a polysilicon buffering stress relief layer on the surface of a semiconductor substrate prior to the field oxidation process to restrict lateral silicon dioxide expansion thereby permitting the creation of narrow thermal silicon dioxide side isolation regions in the semiconductor substrate.
Abstract translation: 一种方法是游离缺失盘用于在通过该方法制造的半导体衬底和MOS或CMOS半导体器件形成窄热二氧化硅侧的隔离区。 薄的氧氮化物的横向扩散的阻隔氧气结合使用与之前的场氧化处理后的半导体基板的表面上的多晶硅缓冲应力消除层来限制侧向二氧化硅扩张从而允许窄热二氧化硅侧隔离区的创建 基板在半导体。
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公开(公告)号：EP0864155A1
公开(公告)日：1998-09-16
申请号：EP97943475.0
申请日：1997-09-25
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： HULL, Richard, L. , YACH, Randy, L.
Abstract: A technique is disclosed for reading a memory element (25) of an EPROM array (12) embedded in a microcontroller chip (10) which has been scaled down from a previous design by virtue of reduced line widths of a process technology used for fabricating the chip. The microcontroller chip (10) has a predetermined supply voltage (40), and the array (12) comprises rows and columns of addressable memory elements (12) which may be selectively accessed to read data content therefrom in a low voltage mode in which the supply voltage initially rises and ultimately reaches substantially its maximum voltage during a read cycle. A regulated reference voltage (Vref) is used to exercise row and column control in the low voltage read mode by tracking the level of the supply voltage up to a certain preselected level below the maximum supply voltage (Vdd), and by clamping the row and column control voltage at substantially the preselected level despite increases in the level of the supply voltage above the preselected level.
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265.发明公开MICROCONTROLLER WITH DUAL PORT RAM FOR LCD DISPLAY AND SHARING OF SLAVE PORTS 失效与微处理器双口RAM存储器，用于液晶显示器和奴隶盖茨共同使用
公开(公告)号：EP0847573A1
公开(公告)日：1998-06-17
申请号：EP97931324.0
申请日：1997-06-27
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： DRAKE, Rodney , ALLEN, Ray
CPC classification number: G06F3/147 , G09G3/18 , G09G3/3696
Abstract: A dual port random access memory (RAM) stores data representative of information to be displayed on the LCD. The RAM includes a plurality of master data storage latches (150-153) and a single slave data storage latch (154) shared by all of the plurality of master storage latches (150-153). A microcontroller has a central processing unit (CPU) for communicating with the master storage latches (150-153) via one of the RAM ports to periodically change the data stored therein. An LCD control module successively updates the data in the single slave storage latch (154) with data from each of the master storage latches (150-153) and downloads the updated data from the single slave storage latch (154) to a temporary store associated with the LCD after each update from a master storage latch and before the update of data from the next master storage latch.
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Patent Agency Ranking266.发明公开
公开(公告)号：EP0840955A1
公开(公告)日：1998-05-13
申请号：EP97926506.0
申请日：1997-05-21
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： HULL, Richard, L. , BINGHAM, Gregory
CPC classification number: H03K17/164 , G06F1/08 , G06F15/7814 , H03K3/0231 , Y02D10/12 , Y02D10/13
Abstract: A microcontroller circuit having firmware selectable oscillator trimming includes, in combination, a microcontroller, an oscillator located within the microcontroller for providing a system clock signal for the microcontroller, and a memory portion for providing trimming data to the oscillator for trimming frequency of the system clock. The microcontroller circuit includes microcontroller logic which has the trimming data stored therein for transfer to the memory portion. Additionally, the microcontroller logic permits the user to alter the trimming data after it has been transferred to the memory portion, thereby permitting the user to alter the amount of modification of the system clock frequency from the amount associated with the trimming data.
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公开(公告)号：EP0840953A1
公开(公告)日：1998-05-13
申请号：EP97921253.0
申请日：1997-04-12
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： HULL, Richard, L. , ELLISON, Scott
CPC classification number: H03K19/01759
Abstract: The invention relates to a configurable IC device pin (14), which may be either a device clock input pin or a digital I/O pin in one embodiment, or a reset pin or a digital I/O pin in another embodiment. Both embodiments use a memory device (16) to store configuration data for the pin. Input/output logic (18) is also used in both embodiments to transfer data to and from the IC pin (14) when configured as a digital I/O pin.
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公开(公告)号：EP0811191A1
公开(公告)日：1997-12-10
申请号：EP96939461.0
申请日：1996-10-10
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： NOLAN, James, B. , DELLACROCE, Brian , COOPER, Russell, E.
CPC classification number: G05D23/1917 , G06F11/3024 , G06F11/3058 , G06F11/3093 , H02J7/0004
Abstract: A microcontroller (10) for use in battery charging and monitoring applications is disclosed. The microcontroller (10) includes a microprocessor (12) and various front-end analog circuitry including a slope A/D converter (30) and a multiplexer for allowing a plurality of analog input signals to be converted to corresponding digital counts indicative of signal level. The microcontroller (10) further includes an on-chip temperature sensor (54) used in conjunction with the A/D converter (30), to monitor the temperature of the microcontroller (10). The temperature sensor (54) generates and uses a differential voltage that is obtained across the base-emitter junctions of two compatible bipolar transistors having dissimilar emitter areas. This differential voltage is proportional to temperature and may be sampled by the A/D converter (30) to obtain a digital count indicative of the temperature of the microcontroller (10).
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公开(公告)号：EP0797802A2
公开(公告)日：1997-10-01
申请号：EP96945378.0
申请日：1996-09-11
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： DELLACROCE, Brian , NOLAN, James, B. , NGUYEN, Hung, Q.
CPC classification number: H02J7/0077 , G01R35/005 , H02J7/0052
Abstract: A microcontroller (10) for use in battery charging and monitoring applications is disclosed. The microcontroller (10) includes a microprocessor (12) and various front-end analog circuitry such as a slope A/D converter (30) and a multiplexer (32) for allowing a plurality of analog input signals to be converted to corresponding digital counts indicative of signal level. In order to make the measurements of the selected analog inputs more precise, the microcontroller (10) uses a unique calibration procedure whereby selected parameters associated with the analog circuitry that are subject to variation are measured during test and corresponding calibration constants are calculated therefrom and stored in program memory. These stored calibration constants are subsequently used by the microprocessor (12) in conjunction with the digital counts of the analog input signals for calculating a more precise measurement of the analog input signals.
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270.发明公开
公开(公告)号：EP0775385A1
公开(公告)日：1997-05-28
申请号：EP96916577.0
申请日：1996-05-30
Applicant: MICROCHIP TECHNOLOGY INC.
Inventor： COOPER, Russell, E.
CPC classification number: H03K3/3545 , H03K3/012
Abstract: An oscillator circuit (30, 40) for starting-up and operating at low voltages has been provided. The oscillator circuit includes an inverter circuit (31, 41) coupled across first and second terminals of a resonant circuit (14). The inverter circuit includes a push-pull driver stage having a P-channel transistor (18) and an N-channel transistor (20). The common drain electrodes of each are coupled to the second terminal of the resonant circuit. The source electrodes of the P- and N-channel transistors are respectively coupled to first and second supply voltage terminals. The gate electrode of the first transistor is coupled to the first terminal of resonant circuit. The inverter circuit further includes a circuit (32, 42) for shifting the voltage level applied to the gate electrode of the second transistor, relative to the voltage applied to the gate electrode of the first transistor, by a predetermined voltage. This has the effect of reducing the required operating voltage range of the inverter circuit while still maintaining both transistors active.
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