公开(公告)号：EP2822372A1

公开(公告)日：2015-01-07

申请号：EP13175312.1

申请日：2013-07-05

Applicant: Pentair Technical Solutions GmbH

Inventor： Dizel, Sergej ,  Mann, Dietmar ,  Gauges, Dietmar ,  Müller, Jochen

IPC: H05K7/14 ,  H05K1/14

CPC classification number: H05K5/0256 ,  H05K1/144 ,  H05K7/1427 ,  H05K7/1445 ,  H05K2201/042 ,  H05K2201/044 ,  H05K2201/09036 ,  H05K2201/10409 ,  H05K2201/2036 ,  Y10T29/53183

Abstract: Ein Gehäuse (1) zur Aufnahme von elektronischen Steckkarten (4a) umfasst eine Front (2), eine Rückseite (3), einen vorderen Kartenkorb (5) zum Einbau von Steckkarten (4a) von der Front (2) her, einen hinteren Kartenkorb (6) zum Einbau von Steckkarten (4a) von der Rückseite (3) her, eine erste vertikale Backplane (7), die am Ende des vorderen Kartenkorbs (5) so befestigt ist, dass ihre Vorderseite (8) zur Front (2) des Gehäuses (1) weist, ferner eine zweite vertikale Backplane (11) parallel und mit Abstand auf der Rückseite (9) der ersten Backplane (7) so angeordnet ist, dass die Vorderseite (12) der zweiten Backplane (11) zur Rückseite (3) des Gehäuses (1) weist. Abstandshalter (14) verbinden die beiden Backplanes (7, 11) miteinander.
An mindestens einer der einander zugewandten Rückseiten (9, 13) der beiden parallelen Backplanes (7, 11) sind Plansenkungen vorgesehen, auf deren Grund die Abstandshalter (14) anliegen. Die Tiefen der Plansenkungen sind derart gewählt, dass der Abstand (s 1 ) zwischen der Vorderseite (12) der zweiten Backplane (11) und der Front (2) des Gehäuses (1) einem vorbestimmten Wert entspricht. Dadurch ist sichergestellt, dass der hintere Kartenkorb (6) ausreichend tief ist, unabhängig von der schwankenden Dicke der Backplanes (7, 11).

Abstract translation: 用于容纳电子插件卡的机柜具有用于插入插卡和第一和第二垂直背板的前后卡筐。 第一背板的前侧面向机柜的前部，第二个背板的前侧面向机柜后部。 距离件连接两个底板，并且在两个背板的至少一个后侧设置沉孔。 钻孔后沉孔的深度或底板的残余厚度的尺寸使得第二背板的前侧与机柜前部之间的距离是预定值。 这样可确保推到第二背板上的插卡完全接收在后卡筐内，插卡的前板与后卡筐齐平。

公开(公告)号：EP1831970B1

公开(公告)日：2014-04-09

申请号：EP05855654.9

申请日：2005-12-23

Applicant: AMPHENOL CORPORATION

Inventor： COHEN, Thomas, S. ,  CARTIER, JR., Marc B. ,  GAILUS, Mark W.

IPC: H01R13/648

CPC classification number: H05K7/1445 ,  H01R13/514 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/116 ,  H05K1/14 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09718 ,  H05K2201/10189 ,  H05K2203/1572

公开(公告)号：EP2528421A1

公开(公告)日：2012-11-28

申请号：EP11305644.4

申请日：2011-05-26

Applicant: Alcatel Lucent

Inventor： Hooghe, Koen

IPC: H05K1/14

CPC classification number: H05K1/14 ,  H01P5/103 ,  H05K1/0243 ,  H05K1/141 ,  H05K7/1459 ,  H05K2201/0311 ,  H05K2201/044 ,  H05K2201/10189

Abstract: A serial link interconnection arrangement for interconnecting a first printed circuit board (BoardA) with a second printed circuit board (BoardB), both boards being inserted in a backplane of a telecommunication system. The arrangement comprises a waveguide embedded in the backplane. A first end (WavA) of the waveguide is coupled to the first board (BoardA) via a first connection system (ConA), whilst the second end (WavB) of the waveguide is coupled to the second board (BoardB) via a second connection system (ConB). Each of the connection systems (ConA; ConB) comprises a transceiver (IntA; IntB) adapted to convert a parallel signal received from the printed circuit board (BoardA; BoardB) into a serial stream transmitted to an end (WavA; WavB) of the waveguide via an antenna (AntA; AntB), and vice-versa.

Abstract translation: 用于第一印刷电路板（BoardA）与第二印刷电路板（BoardB）两种板被插入电信系统的背板上。互连串行链路互连装置，该装置包括嵌入在所述背板的波导。 波导的第一端（WAVA）经由第一连接系统（Con A的）耦合到所述第一板（BoardA），而第二端（WavB）的波导通过第二连接耦合到所述第二板（BoardB） 系统（CONB）。 各连接系统（刀豆; CONB）包括收发器（INTA; INTB）angepasst转换为并行信号从印刷电路板接收（BoardA; BoardB）插入mitted到结束的串行流反式;的（WAVA WavB） 经由天线波导（安塔; ANTB），并且反之亦然。

公开(公告)号：EP2419971A1

公开(公告)日：2012-02-22

申请号：EP09843464.0

申请日：2009-04-17

Applicant: Hewlett-Packard Company

Inventor： KADRI, Rachid, M. ,  CONTRERAS, Stephen F.

IPC: H01R12/16 ,  H01R12/18 ,  H01R12/36

CPC classification number: H05K1/181 ,  G11C5/066 ,  H05K1/0237 ,  H05K1/114 ,  H05K1/14 ,  H05K2201/044 ,  H05K2201/09227 ,  H05K2201/10189 ,  H05K2201/10545 ,  Y02P70/611 ,  Y10T29/49147

Abstract: A method and system are disclosed to reduce trace length and capacitance in a large memory footprint. When more dual in-line memory module (DIMM) connectors are used per memory channel, the overall bus bandwidth may be affected by trace length and trace capacitance. In order to reduce the overall trace length and trace capacitance, the system and method use a palm tree topology placement, i.e., back-to-back DIMM placement, to place surface mount technology (SMT) DIMM connectors (instead of through-hole connectors) back-to-back in a mirror fashion on each side of a printed circuit board (PCB). The system and method may improve signal propagation time when compared to the commonly used traditional topology placements in which all DIMM connectors are placed on one side of the PCB.

公开(公告)号：EP1884953A3

公开(公告)日：2008-04-02

申请号：EP07114348.1

申请日：1998-09-22

Applicant: Rambus, Inc.

Inventor： Perino, Donald, V. ,  Garrett, Billy, Wayne, Jr. ,  Liaw, Haw-Jyh ,  Nguyen, David ,  Nimmagadda, Srinivas ,  Gasbarro, James, A. ,  Dewitt Crisp, Richard

IPC: G11C5/00 ,  G11C5/06

CPC classification number: G11C5/063 ,  G06F13/1684 ,  G06F13/4086 ,  G06F13/409 ,  G06F13/4247 ,  G11C5/04 ,  G11C7/1048 ,  H05K1/023 ,  H05K1/0246 ,  H05K1/0248 ,  H05K1/14 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09263 ,  H05K2201/10022 ,  H05K2201/10159 ,  H05K2201/10689

Abstract: A high frequency bus system (450) which insures uniform arrival times of high fidelity signals to the devices (510), despite the use of the bus (450) on modules (420) and connectors. The high frequency bus system (450) includes a first bus segment having one or more devices (510) connected between a first and second end. The high frequency bus system (450) also includes a second bus segment which has no devices connected to it. The first end of the first segment and the second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at substantially the same time, they arrive at each device (510) connected to the first bus segment at substantially the same time. Conversely when two signals originate at a device (510) substantially at the same time, they arrive at the first end of the second bus segment at substantially the same time. Uniform arrival times hold despite the use of connectors to couple the segments together, despite the segments being located on modules, without the need for stubs, despite the presence of routing turns in the segments and despite the type of information, such as address, data, or control, carried by the signals.

公开(公告)号：EP1831971A2

公开(公告)日：2007-09-12

申请号：EP05855660.6

申请日：2005-12-23

Applicant: AMPHENOL CORPORATION

Inventor： COHEN, Thomas S. ,  GAILUS, Mark W. ,  DUNHAM, John R.

IPC: H01R13/648

CPC classification number: H01R12/716 ,  H01R12/585 ,  H01R12/724 ,  H01R12/727 ,  H01R13/514 ,  H01R13/6474 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/14 ,  H05K7/1445 ,  H05K2201/044 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: A differential connector (400) including contacts (312) in a plurality of rows (330).

公开(公告)号：EP1831970A2

公开(公告)日：2007-09-12

申请号：EP05855654.9

申请日：2005-12-23

Applicant: AMPHENOL CORPORATION

Inventor： COHEN, Thomas, S. ,  CARTIER, JR., Mark, B. ,  GAILUS, Marc, W.

IPC: H01R13/648

CPC classification number: H05K7/1445 ,  H01R13/514 ,  H01R13/6587 ,  H01R13/6591 ,  H05K1/0231 ,  H05K1/0237 ,  H05K1/116 ,  H05K1/14 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09718 ,  H05K2201/10189 ,  H05K2203/1572

Abstract: A midplane has a first side to which contact ends of a first differential connector are connected and a second side opposite the first side to which contact ends of a second differential connector are connected. The midplane includes a plurality of vias extending from the first side to the second side, with the vias providing first signal launches on the first side and second signal launches on the second side. The first signal launches are provided in a plurality of rows, with each row having first signal launches along a first line and first signal launches along a second line substantially parallel to the first line. The second signal launches are provided in a plurality of columns, with each column having second signal launches along a third line and second signal launches along a fourth line substantially parallel to the third line.

公开(公告)号：EP1647170B1

公开(公告)日：2007-03-28

申请号：EP04744201.7

申请日：2004-07-08

Applicant: Viasystems Group, Inc.

Inventor： HERMKENS, Gerald, A., J. ,  THEELEN, Roger ,  SMEETS, Marcel ,  SPEETJENS, Frank ,  THOOLEN, Peter, J., M.

IPC: H05K7/14 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K1/18 ,  H05K3/306 ,  H05K3/308 ,  H05K3/4623 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/044 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/09536 ,  H05K2201/09972 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/2036 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T428/24917

Abstract: A method for manufacturing a mid-plane. a multi-layer board having a connection assembly is provided and a layer with a channel formed therein to define a perimeter of a connector area is provided. The layer is bonded to the multi-layer board such that the connector area overlaps the part of the connection assembly of the multi-layer board. At least a portion of the connector area in the layer is removed to expose the connection assembly of the multi-layer board. A rigid multilayer is also disclosed. The rigid multilayer includes a multi­layer board and a layer. The multi-layer board has a connection assembly. The layer has a channel formed therein to define a perimeter of a connector area. The layer is bonded to the multi-layer board such that the connector area overlaps the connection assembly of the multi­layer board. The connector area can then be removed such as by depth controlled routing. As will be understood by one skilled in the art, the depth tolerance is not critical because the layer is pre-formed with the channel prior to formation of the rigid multi-layer.

公开(公告)号：EP1647170A1

公开(公告)日：2006-04-19

申请号：EP04744201.7

申请日：2004-07-08

Applicant: Hermkens, Gerald A.J. ,  Theelen, Roger ,  Smeets, Marcel ,  Speetjens, Frank ,  Thoolen, Peter J.M. ,  Viasystems Group, Inc.

Inventor： HERMKENS, Gerald, A., J. ,  THEELEN, Roger ,  SMEETS, Marcel ,  SPEETJENS, Frank ,  THOOLEN, Peter, J., M.

IPC: H05K7/14 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K1/18 ,  H05K3/306 ,  H05K3/308 ,  H05K3/4623 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/044 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/09536 ,  H05K2201/09972 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/2036 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T428/24917

Abstract: A method for manufacturing a mid-plane. a multi-layer board having a connection assembly is provided and a layer with a channel formed therein to define a perimeter of a connector area is provided. The layer is bonded to the multi-layer board such that the connector area overlaps the part of the connection assembly of the multi-layer board. At least a portion of the connector area in the layer is removed to expose the connection assembly of the multi-layer board. A rigid multilayer is also disclosed. The rigid multilayer includes a multi­layer board and a layer. The multi-layer board has a connection assembly. The layer has a channel formed therein to define a perimeter of a connector area. The layer is bonded to the multi-layer board such that the connector area overlaps the connection assembly of the multi­layer board. The connector area can then be removed such as by depth controlled routing. As will be understood by one skilled in the art, the depth tolerance is not critical because the layer is pre-formed with the channel prior to formation of the rigid multi-layer.

公开(公告)号：EP1531653A1

公开(公告)日：2005-05-18

申请号：EP04028406.9

申请日：1999-11-24

Applicant: TERADYNE, INC.

Inventor： Cohen, Thomas S. ,  Gailus, Mark W. ,  Stokoe, Philip T.

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H01R12/727 ,  H01R13/6471 ,  H01R13/6474 ,  H01R13/6587 ,  H01R24/44 ,  H05K1/0237 ,  H05K1/115 ,  H05K1/116 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09718 ,  H05K2201/10189

Abstract: A printed circuit board for receiving differential pair contact tail portions of an electrical connector, particularly an electrical connector for transferring a plurality of differential signals. The printed circuit board has at least one ground plane layer (604) with pairs of apertures (602) configured to receive the differential pair contact tail portions of the connector. For each pair of apertures corresponding to a differential pair, an area (606) surrounding the pair of apertures is free of the ground plane layer.

Abstract translation: 一种用于接收电连接器的差分对接触尾部的印刷电路板，特别是用于传送多个差分信号的电连接器。 印刷电路板具有至少一个具有成对的孔（602）的接地平面层（604），其配置成接收连接器的差分对接触尾部。 对于对应于差分对的每对孔，围绕该对孔的区域（606）没有地平面层。