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    MANUFACTURING METHOD OF A WIRING BOARD CONTAINING A SEED LAYER HAVING A ROUGHENED SURFACE
    271.
    发明申请
    MANUFACTURING METHOD OF A WIRING BOARD CONTAINING A SEED LAYER HAVING A ROUGHENED SURFACE 审中-公开
    含有粗糙表面的籽粒层的接线板的制造方法

    公开(公告)号：US20090238956A1

    公开(公告)日：2009-09-24

    申请号：US12406161

    申请日：2009-03-18

    Applicant: Hironari KOJIMA

    Inventor： Hironari KOJIMA

    IPC: H05K3/00

    CPC classification number: H05K3/108 ,  H05K3/181 ,  H05K3/383 ,  H05K3/384 ,  H05K2201/0344

    Abstract: A seed layer is formed on a top surface of an insulating layer so that a top surface of the seed layer has a predetermined roughness. A resist film is formed on the top surface of the seed layer, the resist film having an opening part through which a portion of the top surface of the seed layer corresponding to an area where a wire is formed is exposed. The wire is formed on the top surface of the seed layer by an electrolytic plating method using the seed layer as an electric supply layer. The resist film is removed after forming the wire. A portion of the seed layer on which the wire is not formed is removed.

    Abstract translation: 种子层形成在绝缘层的顶表面上，使种子层的顶表面具有预定的粗糙度。 在种子层的顶面上形成抗蚀剂膜，该抗蚀膜具有开口部，通过该开口部露出与形成有导线的区域对应的种子层的上表面的一部分。 通过使用种子层作为供电层的电解电镀法，在种子层的顶面上形成线。 形成导线后去除抗蚀剂膜。 除去未形成线的种子层的一部分。

    Method of forming resistors
    276.
    发明授权
    Method of forming resistors 失效
    形成电阻的方法

    公开(公告)号：US6136512A

    公开(公告)日：2000-10-24

    申请号：US325668

    申请日：1999-05-26

    Applicant: Wallace Dean Doeling

    Inventor： Wallace Dean Doeling

    IPC: H01C17/24 ,  H05K1/16 ,  H05K3/18 ,  G03F7/00

    CPC classification number: H05K1/167 ,  H01C17/2416 ,  H05K2201/0344 ,  H05K2203/073 ,  H05K3/181

    Abstract: A method is disclosed for forming resistors that are low cost, easy to manufacture and substantially within 5 percent of their desired value. In one aspect of the method, an electrically resistive material, such as nickel, is deposited directly on an insulating layer, such as a substrate. In preferred embodiments a conductive material, such as copper, is then deposited on the resistive material only at a location where a signal trace is desired. Using photo-imaging, signal traces are formed in the conductive and resistive materials. A resistor is created by forming a gap in the conductive material at a location where the resistor is desired. Current is thereby forced to flow through the resistive material at the location of the gap.

    Abstract translation: 公开了一种用于形成低成本，易于制造并且基本上在其所需值的5％内的电阻器的方法。 在该方法的一个方面，诸如镍的电阻材料直接沉积在诸如基底的绝缘层上。 在优选的实施例中，导电材料（例如铜）然后仅在需要信号迹线的位置上沉积在电阻材料上。 使用光成像技术，在导电和电阻材料中形成信号迹线。 通过在需要电阻器的位置处在导电材料中形成间隙来产生电阻器。 因此，电流在间隙的位置被迫流过电阻材料。

    Method for forming conductive traces and printed circuits made thereby
    277.
    发明授权
    Method for forming conductive traces and printed circuits made thereby 失效
    用于形成由此制成的导电迹线和印刷电路的方法

    公开(公告)号：US6117300A

    公开(公告)日：2000-09-12

    申请号：US113043

    申请日：1998-07-09

    Applicant: Derek Carbin ,  Wendy A. Herrick

    Inventor： Derek Carbin ,  Wendy A. Herrick

    IPC: B32B15/08 ,  H05K3/00 ,  H05K3/02 ,  H05K3/10 ,  H05K3/18 ,  H05K3/38 ,  H05K3/46 ,  C25D5/02

    CPC classification number: H05K3/025 ,  H05K3/108 ,  H05K3/384 ,  H05K2201/0317 ,  H05K2201/0344 ,  H05K2201/0355 ,  H05K2201/10477 ,  H05K2203/0152 ,  H05K2203/0307 ,  H05K2203/0723 ,  H05K2203/0726 ,  H05K3/4652 ,  Y10T29/49155

    Abstract: A method of forming circuit lines on a substrate by applying a roughened conductive metal layer using a copper foil carrier. The copper foil is etched away, leaving the roughened conductive metal embedded in the surface of the substrate. The conductive metal may be treated to remove an oxide layer. A photoresist may also be applied over the treated conductive metal layer to define a fine line circuit pattern. The photoresist defining the fine line circuit pattern is then removed to expose trenches in accordance with the desired circuit pattern. Copper is applied into the trenches over the exposed conductive metal, and the remaining photoresist, and conductive metal underlying the remaining photoresist, is removed to finish the fine line circuit pattern.

    Abstract translation: 通过使用铜箔载体涂布粗糙化的导电金属层，在基板上形成电路线的方法。 蚀刻掉铜箔，留下粗糙的导电金属嵌入衬底的表面。 可以处理导电金属以除去氧化物层。 还可以在经处理的导电金属层上施加光致抗蚀剂以限定细线电路图案。 然后去除限定细线电路图案的光致抗蚀剂，以根据期望的电路图案露出沟槽。 将铜施加到暴露的导电金属上的沟槽中，并且剩余的光致抗蚀剂和剩余光致抗蚀剂下面的导电金属被去除以完成细线电路图案。

    Method for producing a plated-through hole on a printed-circuit board
    278.
    发明授权
    Method for producing a plated-through hole on a printed-circuit board 失效
    在印刷电路板上制造电镀通孔的方法

    公开(公告)号：US5799393A

    公开(公告)日：1998-09-01

    申请号：US669330

    申请日：1996-09-23

    Applicant: Wolf Backasch ,  Rolf Hohmann

    Inventor： Wolf Backasch ,  Rolf Hohmann

    IPC: H05K3/24 ,  H05K3/34 ,  H05K3/40 ,  H05K3/42 ,  H05K3/10

    CPC classification number: H05K3/244 ,  H05K3/428 ,  H05K2201/0344 ,  H05K2203/0571 ,  H05K2203/1423 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/4007 ,  Y10T29/49165

    Abstract: A method for producing a plated-through hole on a printed-circuit board, whereby the printed-circuit board is initially bored, catalyzed, and patterned. The plated-through hole is then fashioned in an electrochemical deposition process so as to make it functional for the through-hole mounting of electrical components. The plating process is preferably carried out with nickel or nickel compounds, so that no additional corrosion protection is required. A direct bonding to the contact lands can be achieved by coating the contact lands with gold or palladium.

    Abstract translation: PCT No.PCT / DE95 / 01497 Sec。 371日期1996年9月23日 102（e）1996年9月23日PCT PCT 1995年10月27日PCT公布。 公开号WO96 / 15651 日期：1996年5月23日印刷电路板上的电镀通孔的制造方法，首先对印刷电路板进行钻孔，催化，图案化。 然后在电化学沉积工艺中形成电镀通孔，以使其成为用于电气部件的通孔安装的功能。 电镀方法优选用镍或镍化合物进行，因此不需要额外的腐蚀保护。 可以通过用金或钯涂覆接触焊盘来实现与接触焊盘的直接接合。

    Method of manufacturing a printed circuit board
    280.
    发明授权
    Method of manufacturing a printed circuit board 失效
    印刷电路板的制造方法

    公开(公告)号：US5376232A

    公开(公告)日：1994-12-27

    申请号：US110540

    申请日：1993-08-23

    Applicant: Darryl J. McKenney ,  Robert D. Cyr

    Inventor： Darryl J. McKenney ,  Robert D. Cyr

    IPC: H05K3/10 ,  H05K3/18 ,  H05K3/42 ,  B44C1/22 ,  B05D5/12 ,  C23F1/00

    CPC classification number: H05K3/426 ,  H05K3/108 ,  H05K3/181 ,  H05K2201/0344

    Abstract: A method of depositing a conductive material on a surface of a printed circuit board, includes the steps of chemically treating at least a portion of a surface of the printed circuit board, disposing a resist layer over the chemically treated surface, depositing a conductive layer in the areas which are not covered by the resist, stripping the resist from the surface of the printed circuit board, and cleaning exposed chemically treated surfaces of the printed circuit board to remove contaminants from the surface of the printed circuit board which were introduced in the chemically treating step.

    Abstract translation: 一种在印刷电路板的表面上沉积导电材料的方法包括以下步骤：化学处理印刷电路板的表面的至少一部分，在抗蚀剂层上方设置抗蚀剂层，将导电层沉积在 未被抗蚀剂覆盖的区域，从印刷电路板的表面剥离抗蚀剂，以及清洁印刷电路板的暴露的经化学处理的表面，以从化学引入的印刷电路板的表面去除污染物 处理步骤。

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