公开(公告)号：EP2138454A1

公开(公告)日：2009-12-30

申请号：EP09290474.7

申请日：2009-06-22

Applicant: Commissariat à l'Energie Atomique

Inventor： Perruchot, François ,  Diem, Bernard ,  Larrey, Vincent ,  Clavelier, Laurent ,  Defay, Emmanuel

IPC: B81C1/00 ,  H03H3/007

CPC classification number: B81C1/00595 ,  B81B2201/0271 ,  B81C2201/0109 ,  B81C2201/014

Abstract: L'Invention se rapporte à un procédé de réalisation d'un composant à partir d'un substrat hétérogène comportant une première et une deuxième parties en au moins un matériau monocristallin, et une couche sacrificielle constituée par au moins un empilement d'au moins une couche de Si monocristallin située entre deux couches de SiGe monocristallin, cet empilement étant disposé entre lesdites première et deuxième partie en matériau monocristallin, caractérisé en ce qu'il consiste à graver ledit empilement en réalisant :
e) au moins une ouverture (20) dans la première et/ou la deuxième parties et la première et/ou la deuxième couche de SiGe de façon à déboucher sur la couche de Si,
f) une élimination de toute ou partie de la couche de Si.

Abstract translation: 基板具有由位于单晶硅 - 锗层之间的单晶硅层（3）的叠层构成的牺牲层。 堆栈是位于两个单晶部分之间。 一个单晶的部分之一是含有一个硅 - 锗材料的外延相容。 另一单晶硅部分是硅，钛酸锶/锆钛酸铅，或锶/钌酸锶/锆钛酸铅中选择。 因此独立权利要求中包括了以下内容：为了实现异质衬底（2）的方法，用于从异质衬底实现一个部件（1）的方法。

公开(公告)号：EP2089312A1

公开(公告)日：2009-08-19

申请号：EP07835541.9

申请日：2007-11-09

Applicant: Agency for Science, Technology and Research

Inventor： TRIPATHY, Sudhiranjan ,  SAHMUGANATHAN, Vicknesh

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00484 ,  B81C2201/0109 ,  B81C2201/0132 ,  B81C2201/017

Abstract: A micromechanical structure and a method of fabricating a micromechanical structure are provided. The micromechanical structure comprises a silicon (Si) based substrate; a micromechanical element formed directly on the substrate; and an undercut formed underneath a released portion of the micromechanical element; wherein the undercut is in the form of a recess formed in the Si based substrate.

公开(公告)号：EP1721866B1

公开(公告)日：2008-12-10

申请号：EP06116530.4

申请日：2002-11-08

Applicant: WiSpry, Inc.

Inventor： Cunningham, Shawn, J. ,  Dereus, Dana R. ,  Sett, Subham ,  Tatic-Lucic, Svetlana

IPC: B81B3/00

CPC classification number: B81B3/0024 ,  B81B3/0051 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C2201/0107 ,  B81C2201/0108 ,  B81C2201/0109 ,  H01H1/04 ,  H01H1/504 ,  H01H59/0009 ,  H01H61/04 ,  H01H2001/0042 ,  H01H2001/0063 ,  H01H2001/0089 ,  H01H2059/0072 ,  H01H2061/006 ,  H01L23/3735 ,  H01L23/522 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/09701 ,  H02N1/006 ,  H02N10/00 ,  Y10T29/49222 ,  H01L2924/00

公开(公告)号：EP1952405A1

公开(公告)日：2008-08-06

申请号：EP06808631.3

申请日：2006-11-22

Applicant: CAVENDISH KINETICS LIMITED

Inventor： KAZINZCI, Robert ,  VAN KAMPEN, Robert ,  SMITH, Charles

IPC: G11C23/00 ,  B81B3/00

CPC classification number: B81C1/00666 ,  B81B3/001 ,  B81B2203/0118 ,  B81C2201/0109 ,  G11C23/00

Abstract: A method of manufacturing a non-volatile memory bitcell comprises the steps of depositing a first layer of conductive material on a substrate and patterning and etching the first layer of conductive material to form three non-linearly disposed electrodes. The method also comprises the steps of depositing a first layer of sacrificial material on the electrodes and the substrate and providing an elongate cantilever structure on the first layer of sacrificial material such that the cantilever structure and at least a portion of each electrode overlap each other. The method also includes the steps of depositing a second layer of sacrificial material on the cantilever structure and the first layer of sacrificial material and providing a capping layer on the second layer of sacrificial material and providing holes in the capping layer such that at least a portion of the second layer of sacrificial material is exposed. Finally, the method provides the step of removing the first and second layers of sacrificial material through the holes provided in the capping layer, thereby defining a cavity in which the cantilever structure is suspended.

公开(公告)号：EP1717195A1

公开(公告)日：2006-11-02

申请号：EP06118802.5

申请日：2002-11-08

Applicant: WiSpry, Inc.

Inventor： Cunningham, Shawn, J. ,  Tatic-Lucic, Svetlana

IPC: B81B3/00

CPC classification number: B81B3/0024 ,  B81B3/0051 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C2201/0107 ,  B81C2201/0108 ,  B81C2201/0109 ,  H01H1/04 ,  H01H1/504 ,  H01H59/0009 ,  H01H61/04 ,  H01H2001/0042 ,  H01H2001/0063 ,  H01H2001/0089 ,  H01H2059/0072 ,  H01H2061/006 ,  H01L23/3735 ,  H01L23/522 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/09701 ,  H02N1/006 ,  H02N10/00 ,  Y10T29/49222 ,  H01L2924/00

Abstract: Trilayered Beam MEMS Device and Related Methods. According to one embodiment, a method for fabricating a trilayered beam is provided. The method can include depositing a sacrificial layer on a substrate and depositing a first conductive layer on the sacrificial layer. The method can also include forming a first conductive microstructure by removing a portion of the first conductive layer. Furthermore, the method can include depositing a structural layer on the first conductive microstructure, the sacrificial layer, and the substrate and forming a via through the structural layer to the first conductive microstructure. Still furthermore, the method can include the following: depositing a second conductive layer on the structural layer and in the via; forming a second conductive microstructure by removing a portion of the second conductive layer, wherein the second conductive microstructure electrically communicates with the first conductive microstructure through the via; and removing a sufficient amount of the sacrificial layer so as to separate the first conductive microstructure from the substrate, wherein the structural layer is supported by the substrate at a first end and is freely suspended above the substrate at an opposing second end.

Abstract translation: 三层梁MEMS器件及相关方法。 根据一个实施例，提供一种制造三层梁的方法。 该方法可以包括在衬底上沉积牺牲层并在牺牲层上沉积第一导电层。 该方法还可以包括通过去除第一导电层的一部分来形成第一导电微结构。 此外，该方法可以包括在第一导电微结构，牺牲层和衬底上沉积结构层，并且通过结构层将通孔形成到第一导电微结构。 此外，该方法可以包括以下：在结构层和通孔中沉积第二导电层; 通过去除所述第二导电层的一部分来形成第二导电微结构，其中所述第二导电微结构通过所述通孔与所述第一导电微结构电连通; 并且去除足够量的牺牲层以便将第一导电微结构与衬底分开，其中结构层在第一端由衬底支撑并且在相对的第二端处自由地悬挂在衬底上方。

公开(公告)号：EP1717194A1

公开(公告)日：2006-11-02

申请号：EP06118800.9

申请日：2002-11-08

Applicant: WiSpry, Inc.

Inventor： Cunningham, Shawn, J. ,  Tatic-Lucic, Svetlana

IPC: B81B3/00

CPC classification number: B81B3/0024 ,  B81B3/0051 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C2201/0107 ,  B81C2201/0108 ,  B81C2201/0109 ,  H01H1/04 ,  H01H1/504 ,  H01H59/0009 ,  H01H61/04 ,  H01H2001/0042 ,  H01H2001/0063 ,  H01H2001/0089 ,  H01H2059/0072 ,  H01H2061/006 ,  H01L23/3735 ,  H01L23/522 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/09701 ,  H02N1/006 ,  H02N10/00 ,  Y10T29/49222 ,  H01L2924/00

Abstract: Trilayered Beam MEMS Device and Related Methods. According to one embodiment, a method for fabricating a trilayered beam is provided. The method can include depositing a sacrificial layer on a substrate and depositing a first conductive layer on the sacrificial layer. The method can also include forming a first conductive microstructure by removing a portion of the first conductive layer. Furthermore, the method can include depositing a structural layer on the first conductive microstructure, the sacrificial layer, and the substrate and forming a via through the structural layer to the first conductive microstructure. Still furthermore, the method can include the following: depositing a second conductive layer on the structural layer and in the via; forming a second conductive microstructure by removing a portion of the second conductive layer, wherein the second conductive microstructure electrically communicates with the first conductive microstructure through the via; and removing a sufficient amount of the sacrificial layer so as to separate the first conductive microstructure from the substrate, wherein the structural layer is supported by the substrate at a first end and is freely suspended above the substrate at an opposing second end.

Abstract translation: 三层束MEMS器件及相关方法。 根据一个实施例，提供了一种用于制造三层光束的方法。 该方法可以包括在衬底上沉积牺牲层并且在牺牲层上沉积第一导电层。 该方法还可以包括通过去除第一导电层的一部分来形成第一导电微结构。 此外，该方法可以包括在第一导电微结构，牺牲层和衬底上沉积结构层，并且形成穿过结构层到达第一导电微结构的通孔。 此外，该方法可以包括以下步骤：在结构层上和通孔中沉积第二导电层; 通过去除所述第二导电层的一部分来形成第二导电微结构，其中所述第二导电微结构通过所述通孔与所述第一导电微结构电连通; 以及去除足够量的牺牲层以便将第一导电微结构与衬底分离，其中结构层在第一端处由衬底支撑并且在相对的第二端处自由地悬挂在衬底上方。

公开(公告)号：EP1454349B1

公开(公告)日：2006-09-27

申请号：EP02793902.4

申请日：2002-11-08

Applicant: WiSpry, Inc.

Inventor： CUNNINGHAM, Shawn, J. ,  TATIC-LUCIC, Svetlana

IPC: H01L21/302 ,  H01L21/4763 ,  H01P1/10 ,  H01H57/00 ,  H02B1/00

CPC classification number: B81B3/0024 ,  B81B3/0051 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C2201/0107 ,  B81C2201/0108 ,  B81C2201/0109 ,  H01H1/04 ,  H01H1/504 ,  H01H59/0009 ,  H01H61/04 ,  H01H2001/0042 ,  H01H2001/0063 ,  H01H2001/0089 ,  H01H2059/0072 ,  H01H2061/006 ,  H01L23/3735 ,  H01L23/522 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/09701 ,  H02N1/006 ,  H02N10/00 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A method for fabricating a trilayered beam MEMS device includes depositing a sacrificial layer (310) on a substrate and depositing and removing a portion of a first conductive layer on the sacrificial layer (310) to form a first conductive microstructure (312); depositing a structural layer (322) on the first conductive microstructure (312); the sacrificial layer (310), and the substrate (300) and forming a via through the structural layer (322) to the first conductive microstructure (312); depositing a second conductive layer (336) on the structural layer (322) and in the via; forming a second conductive microstructure (324) by removing a portion of the second conductive layer (336), wherein the second conductive microstructure (324) electrically communicates with the first conductive microstructure (312) through the via; and removing a sufficient amount of the sacrificial layer (310) so as to separate the first conductive microstructure (312) from the substrate, wherein the structural layer (322) is supported by the substrate at a first end is freely suspended above the substrate at an opposing second end.

公开(公告)号：EP1485758A4

公开(公告)日：2006-09-13

申请号：EP02725847

申请日：2002-04-29

Applicant: IDC LLC

Inventor： MILES MARK W

IPC: G02B26/08 ,  B81B3/00 ,  B81C1/00 ,  G02B26/00 ,  G03F7/20 ,  G03F7/00

CPC classification number: G02B26/001 ,  B81B2201/042 ,  B81B2203/0315 ,  B81C1/00396 ,  B81C2201/0109 ,  B81C2203/0136

Abstract: The invention provides a microfabrication process which may be used to manufacture a MEMS device. The process comprises depositing one or a stack of layers on a base layer, said one layer or an uppermost layer in said stack of layers being a sacrificial layer; patterning said one or a stack of layers to provide at least one aperture therethrough through which said base layer is exposed; depositing a photosensitive layer over said one or a stack of layers; and passing light through said at least one aperture to expose said photosensitive layer.

公开(公告)号：EP1460036A4

公开(公告)日：2006-08-02

申请号：EP02805883

申请日：2002-12-16

Applicant: SONY CORP

Inventor： IKEDA KOICHI ,  KINOSHITA TAKASHI

IPC: B81C1/00 ,  B81B3/00 ,  H01L21/00

CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

Abstract: A method for manufacturing an MEMS element for flattening a drive side electrode surface, reducing irregularities of beam shape, improving performance, and improving performance uniformity. The method includes a step of forming a substrate side electrode on a substrate, a step of forming a fluid film before or after formation of a sacrificial layer, a step of forming a beam having a drive side electrode on a flattened surface, and a step of removing the sacrificial layer.

公开(公告)号：EP1592551A2

公开(公告)日：2005-11-09

申请号：EP04710626.5

申请日：2004-02-12

Applicant: Nantero, Inc.

Inventor： JAIPRAKASH, Venkatachalam, C. ,  WARD, Jonathan, W. ,  RUECKES, Thomas ,  SEGAL, Brent, M.

IPC: B32B7/00 ,  H05K1/03 ,  H01L47/00 ,  H01L27/10 ,  H01L29/73

CPC classification number: G11C23/00 ,  B81B2201/016 ,  B81B2203/0127 ,  B81C1/00142 ,  B81C2201/0109 ,  B82Y10/00 ,  G11C13/025 ,  G11C14/00 ,  G11C2213/16 ,  G11C2213/77 ,  G11C2213/81 ,  H01H1/0094

Abstract: A discrete electro-mechanical device includes a structure (182) having an electrically-conductive trace. A defined patch of nanotube fabric (154) is disposed in spaced relation to the trace; and the defined patch of nanotube fabric (154) is electromechanically deflectable between a first and second state. In the first state, the nanotube article is in contact with the trace. A low resistance signal path is in electrical communication with the defined patch of nanofabric (154). Under certain embodiments, the structure (182) includes a defined gap (180) into which the electrically conductive trace is disposed.