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    23.
    发明专利
    未知

    公开(公告)号：DE60132437T2

    公开(公告)日：2009-01-08

    申请号：DE60132437

    申请日：2001-03-26

    Applicant: IBM

    Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  HEDDES MARCO ,  SIEGEL MICHAEL STEVEN ,  VERPLANKEN FABRICE JEAN

    IPC: H04L12/54 ,  H04L47/52 ,  H04L47/56 ,  H04Q11/04

    Abstract: A system and method of moving information units from a network processor toward a data transmission network in a prioritized sequence which accommodates several different levels of service. The present invention includes a method and system for scheduling the egress of processed information units (or frames) from a network processing unit according to stored priorities associated with the various sources of the information units. The priorities in the preferred embodiment include a low latency service, a minimum bandwidth, a weighted fair queueing and a system for preventing a user from continuing to exceed his service levels over an extended period. The present invention includes a plurality of calendars with different service rates to allow a user to select the service rate which he desires. If a customer has chosen a high bandwidth for service, the customer will be included in a calendar which is serviced more often than if the customer has chosen a lower bandwidth.

    METHOD AND SYSTEM FOR FRAME AND PROTOCOL CLASSIFICATION
    25.
    发明专利
    METHOD AND SYSTEM FOR FRAME AND PROTOCOL CLASSIFICATION 未知

    公开(公告)号：CA2385339C

    公开(公告)日：2005-06-28

    申请号：CA2385339

    申请日：2000-12-21

    Applicant: IBM

    Inventor： JENKINS STEVEN KENNETH ,  SIEGEL MICHAEL STEVEN ,  CALVIGNAC JEAN LOUIS ,  BASS BRIAN MITCHELL ,  LEAVENS ROSS BOYD ,  VERPLANKEN FABRICE JEAN ,  HEDDES MARCO ,  DAVIS GORDON TAYLOR ,  GALLO ANTHONY MATTEO

    IPC: H04L12/28 ,  H04L12/46 ,  H04L12/56 ,  H04L45/60 ,  G06F9/46 ,  H04L29/06

    Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristic s for the frame (or input information unit) include the type of layer 3 protoc ol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics o f the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction addre ss and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed a nd forwarded in the same order in which they are received.

    METHOD AND SYSTEM FOR FRAME AND PROTOCOL CLASSIFICATION
    26.
    发明专利
    METHOD AND SYSTEM FOR FRAME AND PROTOCOL CLASSIFICATION 未知

    公开(公告)号：CA2385339A1

    公开(公告)日：2001-07-12

    申请号：CA2385339

    申请日：2000-12-21

    Applicant: IBM

    Inventor： HEDDES MARCO ,  LEAVENS ROSS BOYD ,  SIEGEL MICHAEL STEVEN ,  GALLO ANTHONY MATTEO ,  DAVIS GORDON TAYLOR ,  BASS BRIAN MITCHELL ,  VERPLANKEN FABRICE JEAN ,  CALVIGNAC JEAN LOUIS ,  JENKINS STEVEN KENNETH

    IPC: H04L12/28 ,  H04L12/46 ,  H04L12/56 ,  H04L45/60 ,  G06F9/46 ,  H04L29/06

    Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristic s for the frame (or input information unit) include the type of layer 3 protoc ol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics o f the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction addre ss and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed a nd forwarded in the same order in which they are received.

    CONMUTADOR Y COMPONENTES DE RED Y METODO DE FUNCIONAMIENTO.
    27.
    发明专利
    CONMUTADOR Y COMPONENTES DE RED Y METODO DE FUNCIONAMIENTO. 未知

    公开(公告)号：ES2265971T3

    公开(公告)日：2007-03-01

    申请号：ES00959158

    申请日：2000-08-24

    Applicant: IBM

    Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  GALLO ANTHONY MATTEO ,  HEDDES MARCO C ,  RAO SRIDHAR ,  SIEGEL MICHAEL STEVEN

    IPC: G06F13/00 ,  G06F15/16 ,  G06F13/38 ,  G06F13/40 ,  G06F15/00 ,  G06F15/173 ,  G06F15/177 ,  G06F15/76 ,  H04L12/56

    Abstract: Aparato que comprende: un procesador del punto de control; un dispositivo de interfaz conectado operativamente a dicho procesador del punto de control por un camino de control y que proporciona un camino de datos de alta velocidad, teniendo dicho dispositivo de interfaz un substrato (10) de semiconductores; una pluralidad de procesadores (12) del interfaz formados sobre dicho substrato, siendo el número de dichos procesadores al menos cinco; una memoria interna de instrucciones formada sobre dicho substrato y que almacena instrucciones de manera accesible para dichos procesadores del interfaz; una memoria interna de datos formada sobre dicho substrato y que almacena datos que pasan a través de dicho dispositivo, de manera accesible para dichos procesadores del interfaz; y una pluralidad de puertos de entrada/salida formados sobre dicho substrato; conectando al menos uno de dichos puertos de entrada/salida a dicha memoria interna de datos con la memoria externa de datos; intercambiando, al menos otros dos de dichos puertos de entrada/salida, datos que pasan a través del dispositivo de interfaz, con una red externa a la velocidad del medio bajo la dirección de dichos procesadores del interfaz; cooperando dicho procesador del punto de control con dicho dispositivo de interfaz, cargando en el interior de dicha memoria de instrucciones las instrucciones que han de ser ejecutadas por dichos procesadores del interfaz al dirigir el intercambio de datos entre dichos puertos de entrada/salida de intercambio de datos y el flujo de datos a través de dicha memoria de datos.

    METHOD AND SYSTEM FOR FRAME AND PROTOCOL CLASSIFICATION
    29.
    发明专利
    METHOD AND SYSTEM FOR FRAME AND PROTOCOL CLASSIFICATION 未知

    公开(公告)号：PL355786A1

    公开(公告)日：2004-05-17

    申请号：PL35578600

    申请日：2000-12-21

    Applicant: IBM

    Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  DAVID GORDON TAYLOR ,  GALLO ANTHONY MATTEO ,  HEDDES MARCO ,  JENKINS STEVEN KENNETH ,  LEAVENS ROSS BOYD ,  SIEGEL MICHAEL STEVEN ,  VERPLANKEN FABRICE JEAN

    IPC: H04L12/28 ,  H04L12/46 ,  H04L12/56 ,  H04L45/60 ,  G06F9/46

    Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.

    Method and system for frame and protocol classification
    30.
    发明专利
    Method and system for frame and protocol classification 未知

    公开(公告)号：HK1054098A1

    公开(公告)日：2003-11-14

    申请号：HK03106314

    申请日：2003-09-05

    Applicant: IBM

    Inventor： BASS BRIAN MITCHELL ,  CALVIGNAC JEAN LOUIS ,  DAVIS GORDON TAYLOR ,  GALLO ANTHONY MATTEO ,  MARCO HEDDES ,  KENNETH JENKINS STEVEN ,  BOYD LEAVENS ROSS ,  STEVEN SIEGEL MICHAEL ,  JEAN VERPLANKEN FABRICE

    IPC: H04L12/28 ,  H04L12/46 ,  H04L12/56 ,  H04L45/60

    Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.

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