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21.发明专利
公开(公告)号：DE3162887D1
公开(公告)日：1984-05-03
申请号：DE3162887
申请日：1981-08-19
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , FAULKNER EDWARD HAROLD , GASPARRI ANGELO SALVATORE , MAGEE ROBERT ALBERT , REMSEN LAWRENCE PETER , SAYLOR DENNIS LEONARD , STRICKER ALFRED ALOIS
Abstract: Vertically displaceable green sheet support fixtures are borne by respective horizontally movable carriages traveling on common rails between respective dual loading stations and a common unloading station, through separate intermediate screening stations, with the carriages movable in opposite directions and out of phase stationwise. The carriages have fixedly coupled thereto, horizontally movable trailers which bear trays of stacked green sheets for selective transfer of the uppermost green sheet to a loading head at the loading station while the carriage borne fixture itself is at a screening station for paste screening of a prior transferred green sheet. Masks employed in screen printing at the screening station are removed from the screening station console and placed in a cleaning chamber for solvent removal of residual screening paste and are air dried prior to return to the screening station console. During cleaning of a dirty mask, a second clean mask is automatically presented at the station to eliminate throughput-loss. The fixture is vertically displaceable on the carriage and its height incrementally varied depending upon green sheet thickness variation. Accelerated vertical separation of the carriage borne green sheet from the mask is effected subsequent to initial slow incremental separation therebetween.
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公开(公告)号：DE69634870T2
公开(公告)日：2006-05-11
申请号：DE69634870
申请日：1996-10-28
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , HARBOUR EDWARD EARL , LEPPERT PAUL , MARKS LAURENCE VICTOR , MINN ANDRE BYUNGYUP , STEVENS BRYAN S
Abstract: An adapter (250) for providing data communications for a personal computer to other remote data communications systems of various communication platforms is disclosed. The remote data communications systems can be a data circuit terminating equipment (DCE) such as a modem, or a data terminating equipment (DTE) such as an ISDN terminal adapter. The adapter comprises a programmable digital signal processing device (22), a memory device (24, 25) and an assortment of transceiving devices (27, 28). A software program is stored in the memory device for instructing the programmable digital signal processing device. The transceiving devices is controlled by the programmable DSP device such that the appropriate transceiving device can be activated for providing data communications, according to the type of communication platform utilized by the remote data communications equipment.
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公开(公告)号：HU0203823A2
公开(公告)日：2003-05-28
申请号：HU0203823
申请日：2000-12-21
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , DAVIS GORDON TAYLOR , GALLO ANTHONY MATTEO , HEDDES MARCO , JENKINS STEVEN KENNETH , LEAVENS ROSS BOYD , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.
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公开(公告)号：AU2002302830A1
公开(公告)日：2003-01-21
申请号：AU2002302830
申请日：2002-06-18
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , JEFFRIES CLARK DEBS , CALVIGNAC JEAN LOUIS , DAMON PHILIPPE , BASSO CLAUDE , HEDDES MARCO
IPC: G06F17/30
Abstract: A method and system for performing a pattern match search for a data string having a plurality of characters separated by delimiters. In accordance with the method of the present invention a search key is constructed by generating a full match search increment comprising the binary representation of a data string element, wherein the data string element comprises all characters between a pair of delimiters. The search key is completed by concatenating a pattern search prefix to the full match search increment, wherein the pattern search prefix is a cumulative pattern search result of each previous full match search increment. A full match search is then performed within a lookup table utilizing the search key. In response to finding a matching pattern within the lookup table, the process returns to constructing a next search key. In response to not finding a matching pattern, the previous full match search result is utilized to process the data string.
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Patent Agency Ranking
公开(公告)号：CA2429151A1
公开(公告)日：2002-07-25
申请号：CA2429151
申请日：2002-01-17
Applicant: IBM
Inventor： BARKER KENNETH JAMES , DAVIS GORDON TAYLOR , JEFFRIES CLARK DEBS , RINALDI MARK ANTHONY , SUDEEP KARTIK
Abstract: The decision to discard or forward a packet is made by a flow control mechanism, upstream from the forwarding engine in the node of a communication network. The forwarding engine includes a switch with mechanism to detect congestion in the switch and return a binary signal B indicating congestion or no congestion. The flow control mechanism uses B and other network related information to generate a probability transmission table against which received packets are tested to determine proactively whether a packet is to be discarded or forwarded.
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公开(公告)号：BR0015717A
公开(公告)日：2002-07-23
申请号：BR0015717
申请日：2000-12-21
Applicant: IBM
Inventor： BASS BRIAN MITCHELL , CALVIGNAC JEAN LOUIS , DAVIS GORDON TAYLOR , GALLO ANTHONY MATTEO , HEDDES MARCO , JENKINSS STEVEN KENNETH , LEAVENS ROSS BODY , SIEGEL MICHAEL STEVEN , VERPLANKEN FABRICE JEAN
Abstract: A system and method of frame protocol classification and processing in a system for data processing (e.g., switching or routing data packets or frames). The present invention includes analyzing a portion of the frame according to predetermined tests, then storing key characteristics of the packet for use in subsequent processing of the frame. The key characteristics for the frame (or input information unit) include the type of layer 3 protocol used in the frame, the layer 2 encapsulation technique, the starting instruction address, flags indicating whether the frame uses a virtual local area network, and the identity of the data flow to which the frame belongs. Much of the analysis is preferably done using hardware so that it can be completed quickly and in a uniform time period. The stored characteristics of the frame are then used by the network processing complex in its processing of the frame. The processor is preconditioned with a starting instruction address and the location of the beginning of the layer 3 header as well as flags for the type of frame. That is, the instruction address or code entry point is used by the processor to start processing for a frame at the right place, based on the type of frame. Additional instruction addresses can be stacked and used sequentially at branches to avoid additional tests and branching instructions. Additionally, frames comprising a data flow can be processed and forwarded in the same order in which they are received.
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公开(公告)号：DE68922444T2
公开(公告)日：1996-02-15
申请号：DE68922444
申请日：1989-07-14
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , HO LUNG MICHAEL GEORGE , MANDALIA BAIJU DHIRAJLAL , MILLAS ROLAN JOSE , ORTEGA OSCAR EMILIO , PICON RAFAEL JOSE , QUEEN LORAN RAY , ROBINSON RICHARD HOUSTON , ROBINSON WILLIAM ROBERT , SHARP LEO ALVIN , VAN DEN BERG JAN WOUTER
Abstract: A dual digital signal processor (DSP) provides real time links between multiple time division channels of a digital carrier system (e.g. T-1) and a host data processor. Operating only on digital signals, internally and at its interfaces to the carrier and host systems, the DSP exchanges data and control signalling information with the carrier system and data and control information with the host processor, converting the data in passage to different digital forms. At the interface to the carrier system, signals are received and transmitted in a form adapted to diverse terminal equipment of users remotely linked to the carrier system via the switched public network. At the host interface, signals are transferred and received in a form suited to the data process requirements of the host system (e.g. data bytes directly representing alphanumeric characters). Thus, the DSP acts as the equivalent of multiple different types of modems in performing required conversions. The DSP may also perform processing services in order to reduce the processing burden on the host system (e.g. parity checking of data, detection of specific character functions in data or specific tones in audio signals, selective routing of voice to host storage for voice mail applications, etc.)
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公开(公告)号：DE68920210T2
公开(公告)日：1995-06-29
申请号：DE68920210
申请日：1989-06-20
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , MANDALIA BAIJU DHIRAJLAL
IPC: H04L27/20 , H04L27/18 , H04L27/227 , H04L27/233 , H04L27/22
Abstract: A demodulator mechanism is described for demodulating differential phase modulated carrier signals. This demodulator mechanism solves the following two equations: U = K.[R2.(R1 - S1) + S2.(R1 + S1)] V = K.[R2.(R1 + S1) - S2.(R1 - S1)] where U denotes a first baseband modulation component of the received carrier signal, V denotes a second baseband modulation component of the received carrier signal, K denotes a proportionality constant, R2 denotes the received carrier signal, R1 denotes a delayed version of the received carrier signal which has been delayed by one baud period relative to the received carrier signal, S2 denotes a 90 DEG phase shifted version of the received carrier signal and S1 denotes a delayed version of the phase shifted carrier signal which has been delayed by one baud period relative to the phase shifted carrier signal. Both analog and digital implementations of the demodulator mechanism are described. Double frequency terms are automatically cancelled and no post detection filtering is required for this purpose.
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公开(公告)号：DE68920210D1
公开(公告)日：1995-02-09
申请号：DE68920210
申请日：1989-06-20
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , MANDALIA BAIJU DHIRAJLAL
IPC: H04L27/20 , H04L27/18 , H04L27/227 , H04L27/233 , H04L27/22
Abstract: A demodulator mechanism is described for demodulating differential phase modulated carrier signals. This demodulator mechanism solves the following two equations: U = K.[R2.(R1 - S1) + S2.(R1 + S1)] V = K.[R2.(R1 + S1) - S2.(R1 - S1)] where U denotes a first baseband modulation component of the received carrier signal, V denotes a second baseband modulation component of the received carrier signal, K denotes a proportionality constant, R2 denotes the received carrier signal, R1 denotes a delayed version of the received carrier signal which has been delayed by one baud period relative to the received carrier signal, S2 denotes a 90 DEG phase shifted version of the received carrier signal and S1 denotes a delayed version of the phase shifted carrier signal which has been delayed by one baud period relative to the phase shifted carrier signal. Both analog and digital implementations of the demodulator mechanism are described. Double frequency terms are automatically cancelled and no post detection filtering is required for this purpose.
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