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    CHANNEL BARRIER MODULATED SEMICONDUCTOR DEVICE
    23.
    发明专利
    CHANNEL BARRIER MODULATED SEMICONDUCTOR DEVICE 未知

    公开(公告)号：CA1163729A

    公开(公告)日：1984-03-13

    申请号：CA386686

    申请日：1981-09-25

    Applicant: IBM

    Inventor： FANG FRANK F ,  SAI-HALASZ GEORGE A

    IPC: H01L27/092 ,  H01L21/8238 ,  H01L27/12 ,  H01L29/10 ,  H01L29/772 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76

    Abstract: YO980019 A field effect transistor having operating characteristics based on the control and modulation of the punchthrough phenomenon as well as the space charge limited conduction of channel current. The channel region between the source and the drain regions is appropriately doped p-type such that the n+ doped source and drain depletion regions overlap. The overlapped region is such that in the absence of the gate field it has a potential barrier high enough to prevent injection of electrons for channel conduction, and low enough to be modulated to below the kT/q barrier height criterion by the gate- and the source-to-drain fields. The actual barrier height potential is determined by the doping and channel length. When a positive voltage is applied to the gate, the gate field will cause the potential in the channel to be reduced much the same way as the external field affects an insulator. In addition to the gate field, the sourcedrain potential introduces a longitudinal field which also modulates and distorts the barrier. Alternate structures have insulating substrate or semiconductor substrate and buried layer forming the barrier.

    MULTICOLOR LIGHT EMITTING DIODE ARRAY
    24.
    发明专利
    MULTICOLOR LIGHT EMITTING DIODE ARRAY 未知

    公开(公告)号：CA1107378A

    公开(公告)日：1981-08-18

    申请号：CA305582

    申请日：1978-06-15

    Applicant: IBM

    Inventor： FANG FRANK F ,  SHIH KWANG K

    IPC: H01L27/15 ,  H01L33/00

    Abstract: MULTICOLOR LIGHT EMITTING DIODE ARRAY Multicolor light emitting diode arrays can be made using a binary semiconductor substrate on which is grown a graded epitaxial region of an AB1-xCx semiconductor. Diodes emitting various light colors can selectively be formed in different regions of the gradient by etching away a portion of the graded region. Arrays of colored light emitting diodes can be made by the techniques of diffusion and selective etching of the graded material.

    JOSEPHSON LOGIC CIRCUIT POWERING ARRANGEMENT
    25.
    发明专利
    JOSEPHSON LOGIC CIRCUIT POWERING ARRANGEMENT 未知

    公开(公告)号：CA1079818A

    公开(公告)日：1980-06-17

    申请号：CA281171

    申请日：1977-06-22

    Applicant: IBM

    Inventor： HERRELL DENNIS J ,  FANG FRANK F

    IPC: H03K3/38 ,  H03K19/195

    Abstract: JOSEPHSON LOGIC CIRCUIT POWERING ARRANGEMENT There is provided a logic circuit powering arrangement comprising a chip, and at least a single logic circuit including a bilateral switchable device on the chip capable of carrying Josephson current; an alternating current circuit is connected to the logic circuit for applying alternating current to the switchable device, the amplitude of which is insufficient to switch at the switchable device; and input circuits are provided electrically connected to the switchable device for controlling the switching thereof, and, regulating circuit is disposed on the chip in parallel with the alternating current circuit.

    POWERING SCHEME FOR JOSEPHSON LOGIC CIRCUITS WHICH ELIMINATES DISTURB SIGNALS
    26.
    发明专利
    POWERING SCHEME FOR JOSEPHSON LOGIC CIRCUITS WHICH ELIMINATES DISTURB SIGNALS 未知

    公开(公告)号：CA1078464A

    公开(公告)日：1980-05-27

    申请号：CA249269

    申请日：1976-03-31

    Applicant: IBM

    Inventor： FANG FRANK F ,  HERRELL DENNIS J

    IPC: H01L39/22 ,  H02M7/21 ,  H03K17/92 ,  H03K19/195 ,  H03K3/38

    Abstract: A POWERING SCHEME FOR JOSEPHSON LOGIC CIRCUITS WHICH ELIMINATES DISTURB SIGNALS A Josephson junction terminated line logic powering scheme is disclosed wherein a logic gate and a regulating gate are utilized in at least a single logic circuit to provide a constant voltage to the logic circuit. The circuit comprises a terminated line logic gate with its associated sense gate and a regulating gate in series with the logic gate. When the logic gate is switched to the voltage state, it sends a disturb signal up and down the line which carries the gate current to the logic devices. A regulator gate which has already been biased to the voltage state is reset to the zero voltage state by the disturb signal. The resetting of the regulator gate sends out a disturb signal which cancels the original disturb signal with a small delay. The result of the combination of the disturbance generated by the logic gate and the regulating gate is an extremely narrow pulse with a maximum width equal to the round trip delay between the adjacent gates having an amplitude of 1-1min. In the steady state, the total voltage drop across the supply line remains constant before and after logic operations. Thus, d.c. regulation problems are eliminated. Using this approach for powering logic gates, it is possible to reset the logic gates by applying a control pulse to the regulating gates so that all of these gates which are in the zero voltage state will be switched to the voltage state. The disturbance resulting from this switching action resets the adjacent logic gate in the same manner as the logic.

    27.
    发明专利
    未知

    公开(公告)号：FR2296942A1

    公开(公告)日：1976-07-30

    申请号：FR7521483

    申请日：1975-07-03

    Applicant: IBM

    Inventor： FANG FRANK F

    IPC: H03M1/12 ,  G11C11/44 ,  G11C27/02 ,  H01L39/22 ,  H03K7/02 ,  H03M1/00 ,  H03K13/02

    Abstract: An analog waveform transducing circuit is disclosed which includes a pair of superconductive circuits connected in parallel between a pair of terminals. One of these circuits includes a Josephson tunnelling device and the other includes inductance (which may be distributed) which is greater than the inductance of the Josephson device. An analog signal is applied to one of said terminals. Means are provided for switching said Josephson device between normal and superconductive states to thereby trap one or more flux quanta. An output means is coupled to one of the two circuits.

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