公开(公告)号：DE3279431D1

公开(公告)日：1989-03-09

申请号：DE3279431

申请日：1982-12-20

Applicant: IBM

Inventor： MASTER RAJ NAVINCHANDRA ,  PITTLER MARVIN STANLEY ,  TOTTA PAUL ANTHONY ,  AINSLIE NORMAN GEORGE ,  PALMATEER PAUL HARRY

IPC: B23K1/20 ,  H01L21/48 ,  H01L23/498 ,  H01L23/50 ,  H05K3/24 ,  H05K3/34 ,  H01L23/52

Abstract: In the process for joining metallic coated connector pins (20) to a multilayer ceramic substrate (10), contact areas on the substrate are formed by sequential coatings of molybdenum (12) and nickel (14), which are heated to diffuse the nickel. A pure gold paste is applied by screen printing, for example, followed by the step of firing to burn out the paste binder and to sinter the pure gold particles onto a dense low porosity structure. The sintering operation converts the Ni film (14) into a continuous Au-Ni solid solution. During pin braze, Ni-Sn intermetallics are dispersed in a gold rich matrix of the Au-Ni solid solution.

公开(公告)号：CH614810A5

公开(公告)日：1979-12-14

申请号：CH823877

申请日：1977-07-05

Applicant: IBM

Inventor： KOOPMAN NICHOLAS GEORGE ,  TOTTA PAUL ANTHONY

IPC: H01L23/373 ,  H01L23/433 ,  H01L23/34 ,  H01L21/50

公开(公告)号：DE2243809A1

公开(公告)日：1973-05-10

申请号：DE2243809

申请日：1972-09-07

Applicant: IBM

Inventor： BAKER THEODORE HARRIS ,  GHAFGHAICHI MAJID ,  TOTTA PAUL ANTHONY

IPC: H05K13/02 ,  H01L21/02 ,  H01L21/60 ,  H01L21/822 ,  H01L23/00 ,  H01L27/04 ,  H01L7/34

Abstract: 1393423 Semi-conductor devices INTERNATIONAL BUSINESS MACHINES CORP 12 Sept 1972 [3 Nov 1971] 42279/72 Heading H1K Damage to the surface of a semi-conductor chip 21 due to impact by the edges and corners of other similar chips such as 22 during handling is reduced by arranging a plurality of suitably situated and dimensioned projections on the chip surface. Some of the projections 19 may be contact pads, and additional projections 18 may also be provided having the same height and composition (e.g. a solder bump on a Cr/Cu/ Au layer) on the contact pads 19. Preferably at least 75% of the chip surface area is protected against impact in this way, protection not being necessary in certain regions of the surface where circuit function would not be impaired by the effects of chip impacts.