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    A METHOD OF BRAZING ADJOINING SURFACES OF ELEMENTS
    3.
    发明专利
    A METHOD OF BRAZING ADJOINING SURFACES OF ELEMENTS 未知

    公开(公告)号：DE3170758D1

    公开(公告)日：1985-07-04

    申请号：DE3170758

    申请日：1981-10-29

    Applicant: IBM

    Inventor： AINSLIE NORMAN GEORGE ,  KRZANOWSKI JAMES EDWARD ,  PALMATEER PAUL HARRY

    IPC: B23K1/00 ,  B23K35/00 ,  B23K35/14 ,  B23K35/26 ,  B23K35/30 ,  H01L21/48 ,  B23K35/02

    Abstract: Brazing of metallic elements to an electronic circuit board carrying a plurality of chips requires brazing materials which remain strong at high temperatures used to remove and replace the chips attached by solder balls to the board. According to the present invention flanges and pins (19) are brazed to the board (10) with a gold tin brazing solder (15) which is modified during brazing by addition of a Group IB metal (13) to promote formation of the higher melting point β phase of the solder and a Group VIII metal (14) to drawtin out of the melt by gettering. The melting temperature of the brazing solder is raised substantially during brazing to a value above the melting temperature of the solder balls attached to the chips.

    FILM CONDUCTOR
    6.
    发明专利
    FILM CONDUCTOR 未知

    公开(公告)号：GB1279742A

    公开(公告)日：1972-06-28

    申请号：GB25771

    申请日：1971-01-04

    Applicant: IBM

    Inventor： AINSLIE NORMAN GEORGE ,  CHEROFF GEORGE ,  GRAFF WILLIAM SCHAMANN ,  HOWARD JAMES KENT ,  ROSS RUPERT FOSTER

    IPC: H01L21/00 ,  H01L21/28 ,  H05K1/09

    Abstract: 1279742 Semi-conductor devices; printed circuits. INTERNATIONAL BUSINESS MACHINES CORP 4 Jan 1971 [8 Jan 1970] 257/71 Headings H1K and H1R A film conductor comprises a metal containing an additive for retarding current induced mass transport of the metal. Reservoirs of the additive are disposed adjacent points where mass flux divergences, which cause depletion of the additive, occur. Such divergences occur, e.g. at interfaces with other materials in the current path and in thermal gradients. The depleted material is periodically replenished, e.g. six-monthly, from the reservoirs by heat treatment at 50-550‹ C. Typically, the conductors are of aluminium and contain copper as retardant. Iron, magnesium and silver are other retardants and the invention can also be applied to conductors of silver, gold and platinum. The conductors described constitute interconnections between integrated circuit devices formed in a silicon wafer by known planar techniques. A first layer of interconnections is first deposited over a silicon oxide, nitride or alumina passivating layer and form etched, a further layer of the insulant is then laid down, as by RF sputtering, and apertured at interconnecting points, and then a second layer of interconnections. Finally, a protective silica layer is deposited and apertured at terminal land locations where ball contacts are provided. The metal layers, e.g. of copper-doped aluminium, to which 3% by weight of silicon may be added to limit alloying to the silicon, are formed at a substrate temperature of 200‹ C. by evaporation from an alloy source, by co-evaporation from separate sources or by sequential evaporations of copper and aluminium followed by a heat treatment. Between these processes copper is deposited locally where required (see Figures, not shown) and overlain with chromium to improve the adhesion of subsequently deposited insulation. The invention may also be used with conductive films or substrates for interconnection to semi-conductor and other electronic devices.

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