24.
    发明专利
    未知

    公开(公告)号:DE102004009981B4

    公开(公告)日:2005-12-29

    申请号:DE102004009981

    申请日:2004-03-01

    Abstract: An ESD protective circuit protects an input or output of a monolithically integrated circuit. The ESD protective circuit has at least one bipolar transistor structure and one ESD protective element between two supply networks. The emitter of the bipolar transistor structure is electrically connected to the input or output, while the base is electrically connected to one of the two supply networks. The collector produces a current signal, which is used for triggering of the ESD protective element, when an ESD load occurs at the input or output.

    25.
    发明专利
    未知

    公开(公告)号:FR2827706B1

    公开(公告)日:2004-04-09

    申请号:FR0209195

    申请日:2002-07-19

    Abstract: The present invention creates an operating method for a semiconductor component having a substrate; having a conductive polysilicon strip which is applied to the substrate; having a first and a second electrical contact which are connected to the conductive polysilicon strip such that this forms an electrical resistance in between them; with the semiconductor component being operated reversibly in a current/voltage range in which it has a first differential resistance (Rdiff 1 ) up to a current limit value (It) corresponding to an upper voltage limit value (Vt) and, at current values greater than this, has a second differential resistance (Rdiff 2 ), which is less than the first differential resistance (Rdiff 1 ).

    ESD protection
    27.
    发明专利

    公开(公告)号:GB2382462A

    公开(公告)日:2003-05-28

    申请号:GB0216883

    申请日:2002-07-19

    Abstract: A circuit suitable as an ESD protective element where on occurrence of overvoltage, a low resistance non-destructive path is provided via a semiconductor resistor, which otherwise has a resistance of higher value, for example in a radio-frequency circuit (fig 5). The semiconductor component has a substrate 1, and a cuboid polysilicon strip 10 having electrical contacts 11 and 12. A controllable current source 15 provides the polysilicon strip 10 with a reversible response up to a critical upper current value, the strip having a first differential resistance R diff1 up to a current limit value I t corresponding to an upper voltage limit V 1 , and a second differential resistance R diff2 , less than R diff1 , at current levels above this (fig 2). In second embodiment (fig 4) the semiconductor strip is composed of separate strips of polysilicon (fig 4: 10a-d) having different dopings and lengths.

    28.
    发明专利
    未知

    公开(公告)号:FR2827706A1

    公开(公告)日:2003-01-24

    申请号:FR0209195

    申请日:2002-07-19

    Abstract: The present invention creates an operating method for a semiconductor component having a substrate; having a conductive polysilicon strip which is applied to the substrate; having a first and a second electrical contact which are connected to the conductive polysilicon strip such that this forms an electrical resistance in between them; with the semiconductor component being operated reversibly in a current/voltage range in which it has a first differential resistance (Rdiff 1 ) up to a current limit value (It) corresponding to an upper voltage limit value (Vt) and, at current values greater than this, has a second differential resistance (Rdiff 2 ), which is less than the first differential resistance (Rdiff 1 ).

    OPERATING METHOD FOR A SEMICONDUCTOR COMPONENT

    公开(公告)号:CA2393668A1

    公开(公告)日:2003-01-20

    申请号:CA2393668

    申请日:2002-07-16

    Abstract: The present invention creates an operating method for a semiconductor component having a substrate (1; 5); having a conductive polysilicon strip (10; l0a-d) which is applied to the substrate (1; 5); having a first and a second electrical contact (11, 12; 11a-d, 12a-d) which are connected to the conductive polysilicon strip (10; 10a-d) such that this forms an electrical resistance in between them; with the semiconductor component being operated reversibly in a current/voltage range in which it has a first differential resistance (R diff1) up to a current limit value (I t) corresponding to an upper voltage limit value (V t) and, at current values greater than this, has a second differential resistance (R diff2), which is less than the first differential resistance (R diff1).

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