公开(公告)号：AT376283T

公开(公告)日：2007-11-15

申请号：AT01993064

申请日：2001-10-31

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH ,  WANG SEAN ,  PELUSO VINCENZO

IPC: H03M3/02

Abstract: A control mechanism that can be used to control a SIGMADELTA ADC to provide the required level of performance while reducing power consumption. The SIGMADELTA ADC is designed with multiple stages (i.e., loops or sections), and provides improved performance (e.g., higher dynamic range) as more stages are enabled. The control mechanism selectively enables a sufficient number of stages to provide the required performance and disables remaining stages to conserve power. The control mechanism achieves this by measuring one or more characteristics (e.g., signal level) of the ADC input signal through a SIGMADELTA ADC that is similar to the SIGMADELTA ADC on the signal path, comparing the measured characteristic(s) to particular threshold level(s), and controlling the stages such that the desired objectives are achieved. In one implementation, the control circuit includes one or more detector stages, a conditioning circuit, and a signal processor. The detector stage(s) receive the input signal and provide a detected signal. The conditioning circuit receives the detected signal and provides conditioned samples. The signal processor receives the conditioned samples and provides a control signal that selectively disables zero or more SIGMADELTA stages in the SIGMADELTA ADC.

公开(公告)号：DE60124147D1

公开(公告)日：2006-12-07

申请号：DE60124147

申请日：2001-09-18

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH

IPC: H03M3/02

Abstract: A bandpass SIGMADELTA ADC utilizing either a single-loop or a MASH architecture wherein the resonators are implemented as either a delay cell resonator, a delay cell based resonator, a Forward-Euler resonator, a two-path interleaved resonator, or a four-path interleaved resonator. The resonator can be synthesized with analog circuit techniques such as active-RC, gm-C, MOSFET-C, switched capacitor, or switched current. The switched capacitor or switched current circuits can be designed using single-sampling, double-sampling, or multi-sampling circuits. The non-stringent requirement of a SIGMADELTA ADC using switched capacitor circuits allows the ADC to be implemented in a CMOS process to minimize cost and reduce power consumption. Double-sampling circuits provide improved matching and improved tolerance to sampling clock jitter. In particular, a bandpass MASH 4-4 SIGMADELTA ADC provides a simulated signal-to-noise ratio of 85 dB at an oversampling ratio of 32 for a CDMA application. The bandpass SIGMADELTA ADC can also be used in conjunction with undersampling to provide a frequency downconversion.

公开(公告)号：HK1062958A1

公开(公告)日：2004-12-03

申请号：HK04105812

申请日：2004-08-05

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH ,  ZHANG HAITO ,  ZOU QUIZHEN ,  JHA SANJAY

IPC: H01L20060101 ,  H01L25/18 ,  G01R20060101 ,  H01L23/31 ,  H01L25/065 ,  H01L25/07

Abstract: Techniques for fabricating analog and digital circuits on separate dies and stacking and integrating the dies within a single package to form a mixed-signal IC that provides many benefits. In one aspect, the analog and digital circuits are implemented on two separate dies using possibly different IC processes suitable for these different types of circuits. The analog and digital dies are thereafter integrated (stacked) and encapsulated within the single package. Bonding pads are provided to interconnect the dies and to connect the dies to external pins. The bonding pads may be located and arranged in a manner to provide the required connectivity while minimizing the amount of die area required to implement the pads. In another aspect, the die-to-die connectivity may be tested in conjunction with a serial bus interface.

公开(公告)号：HK1060452A1

公开(公告)日：2004-08-06

申请号：HK04103355

申请日：2004-05-13

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH

IPC: H03M20060101 ,  H03M3/02

Abstract: A bandpass SIGMADELTA ADC utilizing either a single-loop or a MASH architecture wherein the resonators are implemented as either a delay cell resonator, a delay cell based resonator, a Forward-Euler resonator, a two-path interleaved resonator, or a four-path interleaved resonator. The resonator can be synthesized with analog circuit techniques such as active-RC, gm-C, MOSFET-C, switched capacitor, or switched current. The switched capacitor or switched current circuits can be designed using single-sampling, double-sampling, or multi-sampling circuits. The non-stringent requirement of a SIGMADELTA ADC using switched capacitor circuits allows the ADC to be implemented in a CMOS process to minimize cost and reduce power consumption. Double-sampling circuits provide improved matching and improved tolerance to sampling clock jitter. In particular, a bandpass MASH 4-4 SIGMADELTA ADC provides a simulated signal-to-noise ratio of 85 dB at an oversampling ratio of 32 for a CDMA application. The bandpass SIGMADELTA ADC can also be used in conjunction with undersampling to provide a frequency downconversion.

公开(公告)号：AU2003221863A1

公开(公告)日：2003-10-27

申请号：AU2003221863

申请日：2003-04-09

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH

IPC: H03H11/04 ,  H03H7/12 ,  H03H11/12

Abstract: A frequency response adjuster for a frequency responsive circuit, and a method for tuning a frequency response of a circuit, are disclosed. The adjuster may include a time constant sensor, wherein a charging state of the frequency responsive circuit may be measured by, and output from, the time constant sensor as a first voltage, a converter that samples the first voltage and outputs a second voltage resultant from a conversion of the first voltage by the converter, an array of trimming components, and a selector that utilizes the second voltage to select at least one trimming component from the array of trimming components. The method includes the steps of sensing a time constant of the circuit, outputting the sensing as a first voltage, sampling the first voltage over a fixed interval, converting the sampled first voltage to a second voltage, and selecting, utilizing the second voltage, at least one trimming component from an array of trimming components. The time constant of the circuit may be trimmed by the at least one trimming component selected.

公开(公告)号：HK1049932A1

公开(公告)日：2003-05-30

申请号：HK03102105

申请日：2003-03-24

Applicant: QUALCOMM INC

Inventor： CHEN TAO ,  BAZARJANI SEYFOLLAH ,  TIDEMANN EDWARD JR

IPC: H04J1/02 ,  H04Q7/22

公开(公告)号：CA2437193A1

公开(公告)日：2002-08-08

申请号：CA2437193

申请日：2002-01-30

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH ,  GOLDBLATT JEREMY

IPC: G05F3/26 ,  G05F3/20 ,  H03F3/45

Abstract: A bias circuit (126) is described for use in biasing an operational amplifie r (110) to maintain a constant transconductance divided by load capacitance (i.e. a constant gm/CL) despite temperature and process variations and despi te body effects. The bias circuit (126) includes a pair of current source devic es and a switched capacitor (SC) equivalent resistor circuit (136) for developi ng an equivalent resistance between the current source devices. By providing an SC equivalent resistor circuit clocked by non-overlapping fixed clock signal s, the gm/CL of the bias circuit is maintained substantially constant. Hence, a fixed bandwidth is maintained within the operation amplifier being biased. When employed in connection with operational amplifiers of an SC circuit, th e constant bandwidth enables the SC circuit to operate at a constant switching speed despite temp and process variation. Furthermore, by positioning the resistance equivalent circuit (136) between the current source devices of th e bias circuit, voltage differentials between the sources are eliminated there by removing any threshold voltage mismatch and thus compensating for body effec t variations.

公开(公告)号：AU7855500A

公开(公告)日：2001-05-10

申请号：AU7855500

申请日：2000-10-04

Applicant: QUALCOMM INC

Inventor： CHEN TAO ,  BAZARJANI SEYFOLLAH ,  TIEDEMANN EDWARD G JR

IPC: H04J1/02 ,  H04Q7/22 ,  H04B7/12

公开(公告)号：BRPI0014538B1

公开(公告)日：2016-10-11

申请号：BR0014538

申请日：2000-10-04

Applicant: QUALCOMM INC

Inventor： TIEDEMANN EDWARD G JR ,  BAZARJANI SEYFOLLAH ,  CHEN TAO

IPC: H04B7/12 ,  H04J1/02 ,  H04Q7/22

Abstract: "busca de sistema candidato e soft handoff entre freqüências em um sistema, de comunicação móvel de múltiplas portadoras". a presente invenção consiste de uma estação móvel compreendendo: um transmissor para a transmissão de sinais de emissão a partir da estação móvel; e um receptor para a recepção de sinais recebidos, o receptor acoplado ao transmissor e possuindo n sub-receptores, em que n é um número inteiro maior que um e cada um dos n sub-receptores pode ser independentemente sintonizado em uma freqüência desejada. a presente invenção inclui também um sistema de comunicação sem fio compreendendo: (1) uma pluralidade de estações base, em que cada uma das estações base transmite sinais através de pelo menos uma dentre uma pluralidade de freqüências; e (2) uma pluralidade de estações móveis, pelo menos uma dentre a pluralidade de estações móveis compreende: (a) um transmissor para a transmissão de sinais para pelo menos uma dentre a pluralidade de estações base; e um receptor acoplado ao transmissor para recepção de sinais provenientes de pelo menos uma dentre a pluralidade de estações base, o receptor possuindo n sub-receptores, em que n é um número inteiro maior que um e cada um dos n sub-receptores é independentemente sintonizado em uma freqüência desejada.

公开(公告)号：ES2380072T3

公开(公告)日：2012-05-08

申请号：ES00968680

申请日：2000-10-04

Applicant: QUALCOMM INC

Inventor： CHEN TAO ,  BAZARJANI SEYFOLLAH ,  TIEDEMANN EDWARD

IPC: H04B7/12 ,  H04J1/02 ,  H04Q7/22

Abstract: Una estación móvil que comprende: un transmisor para transmitir señales salientes desde la estación móvil; y un receptor para recibir señales entrantes, estando acoplado dicho receptor a dicho transmisor y teniendo dicho receptor N subreceptores, siendo N un entero mayor que uno y siendo cada uno de dichos N subreceptores sintonizable independientemente a una frecuencia deseada, e incluyendo dichos N subreceptores uno de: (a) un primer subreceptor y un segundo subreceptor de dichos N subreceptores que tienen una primera banda de frecuencias y una segunda banda de frecuencias, respectivamente, y dicha primera banda de frecuencias es dos veces más ancha en el dominio frecuencial que dicha segunda banda de frecuencias; o (b) un primer subreceptor y un segundo subreceptor de dichos N subreceptores que tienen una primera banda de frecuencias y una segunda banda de frecuencias, respectivamente, y dicha primera banda de frecuencias es tres veces más ancha en el dominio frecuencial que dicha segunda banda de frecuencias.