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公开(公告)号：FR2816074B1
公开(公告)日：2003-01-03
申请号：FR0013895
申请日：2000-10-30
Applicant: ST MICROELECTRONICS SA
Inventor： GAILHARD BRUNO , FERRAND OLIVIER
Abstract: A generator includes an oscillator for producing a clock signal from an N-bit control number. The oscillator includes a first group of cells, with each cell including at least one series connected inverter. A first selection circuit selects a variable number of the cells as a function of the most significant bits of the control number. The oscillator also includes a second group of cells, with each cell including at least one series connected inverter. A second selection circuit selects one of the cells as a function of the least significant bits of the control number. The selected cells of the first and second groups of cells are series connected to form a chain of inverters.
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公开(公告)号：FR2816074A1
公开(公告)日：2002-05-03
申请号：FR0013895
申请日：2000-10-30
Applicant: ST MICROELECTRONICS SA
Inventor： GAILHARD BRUNO , FERRAND OLIVIER
Abstract: The generator uses a comparison unit (32), first and second decoders (34,36) and an oscillator (40) which has first and second groups of cells. The comparison unit produces a command word (NR) and the most significant bits are decoded by the second decoder and used to select a variable number of cells from the first cell group. The least significant command bits are decoded by the first decoder and select a single cell from the second cell group
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公开(公告)号：FR2867872A1
公开(公告)日：2005-09-23
申请号：FR0402815
申请日：2004-03-18
Applicant: ST MICROELECTRONICS SA
Inventor： FERRAND OLIVIER , GRIL MAFFRE JEAN MICHEL
Abstract: The microprocessor has a blocking device (54) controlled by a control device (34) based on execution of a wait instruction belonging to an instruction set to place the microprocessor in a wait state over an undetermined period. The output of the microprocessor is conditioned by a determined value or a change determined from a value of a condition bit stored in a condition register (100) internal or external to the microprocessor. An independent claim is also included for a method of controlling a microprocessor.
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公开(公告)号：DE60003315D1
公开(公告)日：2003-07-17
申请号：DE60003315
申请日：2000-07-25
Applicant: ST MICROELECTRONICS SA
Inventor： RUAT LUDOVIC , FERRAND OLIVIER , GAILHARD BRUNO
Abstract: A smart card reader includes a housing for receiving a smart card, a microprocessor, and a connector for connecting the microprocessor to the received smart card for establishing communications therebetween. A voltage source provides a power supply voltage to the microprocessor based upon the smart card being received in the housing. The smart card reader further includes a first switch interposed between the voltage source and a power supply terminal of the microprocessor. The first switch is closed when the received smart card is at an end of travel in the housing so that the power supply voltage is provided to the microprocessor, and is opened when the received smart card is no longer at the end of travel in the housing so that the power supply voltage is not provided to the microprocessor.
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公开(公告)号：FR2816136B1
公开(公告)日：2003-04-18
申请号：FR0013897
申请日：2000-10-30
Applicant: ST MICROELECTRONICS SA
Inventor： GAILHARD BRUNO , FERRAND OLIVIER
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Patent Agency Ranking
公开(公告)号：FR2816135B1
公开(公告)日：2003-01-03
申请号：FR0013896
申请日：2000-10-30
Applicant: ST MICROELECTRONICS SA
Inventor： GAILHARD BRUNO , FERRAND OLIVIER
Abstract: A generator includes an oscillator for producing a clock signal from N logic signals representing an N-bit control number, with N being an integer greater than 1. The oscillator has N+1 components. The N most significant components are each assigned a place value i ranging from 1 to N, and a least significant component provides the clock signal. At least one component with a place value i greater than 1 includes first and second arms. The first arm includes a cell and a first switch connected in series, and the second arm includes 1+2 cells and a second switch connected in series. Each cell includes an odd number of inverters.
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公开(公告)号：FR2797700A1
公开(公告)日：2001-02-23
申请号：FR9910684
申请日：1999-08-18
Applicant: ST MICROELECTRONICS SA
Inventor： RUAT LUDOVIC , FERRAND OLIVIER
Abstract: To program the chip card reader (30) an artificial chip card (40) is inserted into the reader. The chip card contains data for programming the memory and has standard contacts (C1-C8) connected electrically to a PC (50) or similar for controlling the programming process. An Independent claim is made for a chip card reader with a microprocessor and a memory that can be programmed by insertion of an artificial chip card containing the programming data in a memory.
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公开(公告)号：FR2797120A1
公开(公告)日：2001-02-02
申请号：FR9910149
申请日：1999-07-30
Applicant: ST MICROELECTRONICS SA
Inventor： RUAT LUDOVIC , FERRAND OLIVIER
Abstract: The digital timer (20) includes a binary counter (21) driven by a counting clock signal (Hc). The counter (21) has a stabilizing time (Ti) after each counting pulse, and means for producing a detection signal (DS2) of a determined value when a counting level (N) is reached. The means for producing the detection signal (DS2) includes: - a cabled logic system (22) arranged or programmed to detect, at the output of the counter (21), a counting value (N-1) of rank immediately lower, relative to the counting sense, at the counting level (N) and to deliver an intermediate signal (DS) of determined value; - means (24) for sampling the intermediate signal (DS1) at the instant (Te) when the counter receives the following counting pulse. The signal (DS1) sampler (24) includes a first synchronous type flip-flop (24) receiving the output of the logic circuit (21) on its data input (D) and the clock signal (Hc) on its clock input (CK). The output of the flip-flop (24) delivers the detection signal (DS2). An Independent Claim is included for a method for transmitting a detection signal when a counting level is reached by the binary counter.
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公开(公告)号：FR2857111B1
公开(公告)日：2005-10-07
申请号：FR0308053
申请日：2003-07-02
Applicant: ST MICROELECTRONICS SA
Inventor： FERRAND OLIVIER , DAVIDESCU DRAGOS
Abstract: The microcontroller has a reset circuit (3) that selectively generates a reset signal for resetting a microprocessor (2). A detection device (4) has an input (5) for receiving a critical logic signal from the microprocessor. The detection device has an output that applies a reset command on the reset circuit, upon detecting a change in the logic state of the logic signal.
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公开(公告)号：FR2867874A1
公开(公告)日：2005-09-23
申请号：FR0402929
申请日：2004-03-22
Applicant: ST MICROELECTRONICS SA
Inventor： FERRAND OLIVIER , GRIL MAFFRE JEAN MICHEL
Abstract: The microprocessor has a mode register (30) with a determined number N of mode bits. A decoding device (28) and an execution unit (12) decodes and executes a given instruction (li) according to two execution modes based on values of a determined number (Qi) of mode bits associated to the instruction. The instruction corresponds to the respective distinct operations in the modes, where Qi is a positive whole number. An independent claim is also included for a method to control a microprocessor having a set of determined instructions that are coded on a number of bits in an instruction coding space.
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