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公开(公告)号:FR2969835A1
公开(公告)日:2012-06-29
申请号:FR1061173
申请日:2010-12-23
Applicant: ST MICROELECTRONICS SA
Inventor: EGOT MATHIEU , MULLER JONATHAN , CATHELIN ANDREIA , BELOT DIDIER
Abstract: Dispositif comprenant des moyens de traitement (MT), des voies d'émission (VE1, ... VEn), un réseau d'antennes pour émettre des signaux comportant plusieurs antennes (A11 ... Ain) respectivement associées aux voies d'émission, plusieurs convertisseurs numérique analogique (DAC) et plusieurs moyens de déphasage (MD1, ...MDn) respectivement associés aux antennes, lesdits moyens de déphasages (MD1, ...MDn) étant placés entre les moyens de traitement (MT) et les convertisseurs numérique analogique (DAC) et comportant des filtres passe-tout numériques de type FIR (PT), les moyens de traitement comprenant des moyens de commande (MC) configurés pour ajuster les coefficients et/ou l'ordre des filtres passe-tout de type FIR.
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公开(公告)号:FR2956538A1
公开(公告)日:2011-08-19
申请号:FR1051011
申请日:2010-02-15
Applicant: ST MICROELECTRONICS SA , CENTRE NAT RECH SCIENT
Inventor: BELOT DIDIER , BEGUERET JEAN-BAPTISTE , DEVAL YANN , DALLET DOMINIQUE , MARIANO ANDRE
IPC: H03M3/02
Abstract: Convertisseur analogique/numérique à temps continu, comprenant un modulateur du type sigma delta (MSD1) configuré pour recevoir un signal d'entrée analogique (x(t)) et comprenant des moyens de filtrage passe-haut (MF) dont la fréquence de coupure est égale à la moitié de la fréquence d'échantillonnage (Fs) du moyen de quantification (QTZ) dudit modulateur (MSD1).
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公开(公告)号:FR2911448B1
公开(公告)日:2009-07-10
申请号:FR0752700
申请日:2007-01-16
Applicant: ST MICROELECTRONICS SA , CENTRE NAT RECH SCIENT
Inventor: BELOT DIDIER , CATHELIN ANDREA , DEVAL YANN , EL HASSAN MOUSTAPHA , KERHERVE ERIC , SHIRAKAWA ALEXANDRE
Abstract: A bulk acoustic wave resonator has an adjustable resonance frequency. A piezoelectric element is provided having first and second electrodes. A switching element is provided in the form of a MEMS structure which is deformable between a first and second position. The switching element forms an additional electrode that is selectively disposed on top of, and in contact with, one of the first and second electrodes. This causes a total thickness of the electrode of the resonator to be changed resulting in a modification of the resonance frequency of the resonator.
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公开(公告)号:FR2864727B1
公开(公告)日:2007-05-11
申请号:FR0403490
申请日:2004-04-02
Applicant: ST MICROELECTRONICS SA
Inventor: RAZAFIMANDIMBY STEPHANE , BELOT DIDIER , CARPENTIER JEAN FRANCOIS , CATHELIN ANDREA
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公开(公告)号:DE69930365T2
公开(公告)日:2006-12-07
申请号:DE69930365
申请日:1999-12-16
Applicant: ST MICROELECTRONICS SA
Inventor: BELOT DIDIER
Abstract: A built-in circuit includes a semiconductor substrate (SB) with a bottom part (PSB) and upper layer (CSB) strongly doped that the bottom part. A first block (BC3) and a second block (BC1) are formed in the upper part of the substrate. An isolating device is arranged closed to the second block (BC1) and includes an isolating circuit (CRS) linked to the bottom part of the substrate (PSB). A mass connection (PTMD1) provide a minimal impedance at a given frequency.
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公开(公告)号:FR2871000A1
公开(公告)日:2005-12-02
申请号:FR0405636
申请日:2004-05-25
Applicant: ST MICROELECTRONICS SA
Inventor: BELOT DIDIER , LE GUASCOZ VINCENT , PACHE DENIS , BERLAND CORINNE , BERCHER JEAN FRANCOIS , HIBON ISABELLE , VILLEGAS MARTINE
Abstract: Un dispositif de modulation de signaux comprend un modulateur sigma-delta (8) disposé pour transformer un signal de modulation d'amplitude en bande de base en un signal d'impulsions (C). Il comprend en outre un modulateur de phase (7) recevant en entrée des signaux analogiques de modulation de phase en bande de base (I, Q). Le signal d'impulsions (C) est mélangé à des signaux de porteuse (P1, P2) en amont du modulateur de phase (7). Le dispositif de modulation est adapté pour constituer un étage d'entrée d'un émetteur.
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公开(公告)号:DE69825527D1
公开(公告)日:2004-09-16
申请号:DE69825527
申请日:1998-05-22
Applicant: ST MICROELECTRONICS SA
Inventor: BELOT DIDIER
IPC: H04L7/033
Abstract: The receiving circuit for bits transmitted on an asynchronous signal (Din) consists of a circuit which provides a reconstructed clock from an asynchronous signal. The clock is designed to sample the asynchronous signal to form a synchronised output signal (Ds). The receiver also has a reception error detection circuit. The error detection circuit consists of a front detector (21, 22, 24, 25), which provides a detection pulse (UP, DN) for each leading edge in a predetermined direction for the asynchronous signal. An alarm circuit (27, 28) generates an warning signal when a leading edge of a synchronous signal (Ds) survives outside a detection pulse (UP, DP).
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公开(公告)号:FR2847726A1
公开(公告)日:2004-05-28
申请号:FR0214905
申请日:2002-11-27
Applicant: ST MICROELECTRONICS SA
Inventor: KNOPIK VINCENT , BELOT DIDIER
Abstract: The module has a dielectric substrates (6) bearing conducting aerial layer and a substrate (8) bearing circuit units (30) e.g. inductance, capacitor, and a conductive shield layer (10). Thickness and nature of the substrate are selected by holding account of surface of a conductive layer and stock points, so that the layer (10) is coupled to the earth by a capacitor constituting a short-circuit for the radio frequencies. The conductive shield layer (10) being floating is laid out between the dielectric substrates.
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公开(公告)号:FR2807595B1
公开(公告)日:2002-07-12
申请号:FR0004501
申请日:2000-04-07
Applicant: ST MICROELECTRONICS SA
Inventor: BEGUERET JEAN BAPTISTE , BELOT DIDIER , DEVAL YANN , FOUILLAT PASCAL , SPATARO ANNE
Abstract: The invention concerns a circuit for generating phase-shifted signals comprising at least two adders (15, 16) each including at least two inputs for receiving identical two-state phase-shifted signals, each input of each adder (15, 16) being assigned a positive or negative single-unit coefficient so that it generates in output of said adders (15, 16) two identical phase-shifted signals.
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公开(公告)号:FR2818054A1
公开(公告)日:2002-06-14
申请号:FR0016034
申请日:2000-12-08
Applicant: ST MICROELECTRONICS SA
Inventor: GEMA DANILO , BELOT DIDIER , KNOPIK VINCENT
Abstract: The invention concerns a transmission-reception head of a high frequency signal in the form of an integrated circuit comprising a transmission amplifier (23) and a reception amplifier (22). The transmission amplifier transmission terminals and the reception amplifier reception terminals are interconnected in a common transmission-reception terminal (20). The head comprises means for selecting one of the amplifiers and means for placing the other amplifier in a state of high impedance, relative to the transmission-reception terminal.
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