GENERATION D'UNE TENSION DE REFERENCE

    公开(公告)号:FR2898701A1

    公开(公告)日:2007-09-21

    申请号:FR0650876

    申请日:2006-03-15

    Abstract: L'invention concerne un circuit de génération d'une tension de référence (VrefP) par un premier transistor MOS (MP0) connecté à une première borne (2) d'application d'une tension d'alimentation (Vdd), ledit premier transistor étant en série avec un deuxième transistor MOS (MP1) commandé par un étage d'entrée d'un amplificateur à transconductance et leur point milieu définissant une borne (13) de sortie fournissant la tension de référence, une première source de courant (31) reliant ladite première borne d'alimentation à une grille du premier transistor, une deuxième source de courant (22) reliant le deuxième transistor à une deuxième borne (3) d'application de la tension d'alimentation, au moins un troisième transistor MOS (MN0, MN9) reliant les deux sources de courant (31, 22), et un élément capacitif (Cbyp) reliant directement ladite borne de sortie à une borne de conduction du troisième transistor pour faire varier la conduction de ce troisième transistor en cas de variation de la tension de sortie.

    22.
    发明专利
    未知

    公开(公告)号:FR2832519A1

    公开(公告)日:2003-05-23

    申请号:FR0114926

    申请日:2001-11-19

    Abstract: A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.

    23.
    发明专利
    未知

    公开(公告)号:FR2818466A1

    公开(公告)日:2002-06-21

    申请号:FR0016400

    申请日:2000-12-15

    Abstract: The invention concerns a variable-gain differential input and output amplifier comprising an attenuation network (AT1, AT2), receiving an input voltage (V1in-V2in) and supplying on several outputs (O1i, O2i) voltages each of which is equal to the attenuated input voltage; differential transconductance elements (G1i, G2i) each having a first input connected to an output (O1i, O2i) of the attenuation network, and producing first (l ) and second (l +) positive currents and first (1 ) and second (1 ) negative currents, a set of current sources (10) for controlling transconductance of each transconductance element based on an analog control signal (Vcom); and an output block (26) converting the first and second input currents into a differential output voltage (V1out-V2out) and supplying to the second input of each transconductance element a feedback voltage dependent on the output voltage.

    24.
    发明专利
    未知

    公开(公告)号:FR2817408A1

    公开(公告)日:2002-05-31

    申请号:FR0015522

    申请日:2000-11-30

    Abstract: The invention concerns a controllable set of current sources (6') comprising several output terminals (Si), a first transistor (T1i') associated with each first output terminal, the current (li) on each first output terminal depending on the current passing through the first transistor, and control means (8) designed, in response to a predetermined control voltage variation (VAB), to make each first transistor (T1i') gradually conductive then gradually non-conductive, wherein the first transistors are MOS transistors, and wherein each first output terminal (Si) is associated with a current mirror formed by MOS transistors (T2i, T3i), said current mirror supplying to the first output terminal a current dependent on the current passing through the first transistor.

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