公开(公告)号：EP0665558B1

公开(公告)日：2001-05-23

申请号：EP94830032.2

申请日：1994-01-31

Applicant: STMicroelectronics S.r.l.

Inventor： Olivo, Marco ,  Maccarrone, Marco

IPC: G11C11/00 ,  G06F11/26 ,  G11C29/00

CPC classification number: G11C29/46 ,  G11C29/14

Abstract: A new method for testing an electrically programmable non-volatile memory and comprising a cell matrix and a state machine which governs the succession and timing of the memory programming phases by means of some control signals (WEN, CEN, OEN and DU) provides exclusion of the internal state machine and modification of the meaning of at least one of the control signals (WEN, CEN, OEN and DU) to program directly the cell matrix and then verify programming correctness.

公开(公告)号：EP0678874B1

公开(公告)日：2000-07-26

申请号：EP94830182.5

申请日：1994-04-19

Applicant: STMicroelectronics S.r.l.

Inventor： Pascucci, Luigi ,  Golla, Carla Maria ,  Maccarrone, Marco

IPC: G11C16/06

CPC classification number: G11C16/28 ,  G11C16/24

公开(公告)号：EP0661717B1

公开(公告)日：2000-03-29

申请号：EP93830545.5

申请日：1993-12-31

Applicant: STMicroelectronics S.r.l.

Inventor： Maccarrone, Marco ,  Olivo, Marco ,  Golla, Carla ,  Padoan, Silvia

IPC: G11C16/06 ,  G11C5/14

CPC classification number: G11C16/30 ,  G11C5/147

公开(公告)号：EP0678870B1

公开(公告)日：1999-07-28

申请号：EP94830073.6

申请日：1994-02-18

Applicant: STMicroelectronics S.r.l.

Inventor： Pascucci, Luigi ,  Golla, Carla Maria ,  Maccarrone, Marco ,  Olivo, Marco

IPC: G11C7/00 ,  G11C16/06

CPC classification number: G11C7/02 ,  G11C7/1006 ,  G11C7/22 ,  G11C16/32

公开(公告)号：EP0662691B1

公开(公告)日：1999-07-07

申请号：EP93830527.3

申请日：1993-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： Olivo, Marco ,  Maccarrone, Marco

IPC: G11C11/00 ,  G11C8/04 ,  G11C16/06 ,  H03K21/00

CPC classification number: H03K21/00 ,  G11C8/04 ,  G11C16/06

公开(公告)号：EP0913829A1

公开(公告)日：1999-05-06

申请号：EP97830558.9

申请日：1997-10-31

Applicant: STMicroelectronics S.r.l.

Inventor： Campardo, Giovanni ,  Commodaro, Stefano ,  Ghezzi, Stefano ,  Maccarrone, Marco

IPC: G11C8/04 ,  G11C16/06

CPC classification number: G11C16/16 ,  G11C8/04

Abstract: The present invention relates to a semiconductor memory device with an improved address signal generator. The memory device comprises an array of memory elements (10), first decoding circuit means (8,15) for decoding a first set of address signals (7,14) for the selection of said memory elements, and second circuit means (4) for the generation internally to the memory of a sequence of values for said address signals (3,11). The second circuit means (4) generates said sequence so that successive values in the sequence differ for the logic state of only one of said address signals (3,11).

Abstract translation: 本发明涉及具有改进的地址信号发生器的半导体存储器件。 存储器件包括存储元件阵列（10），第一解码电路装置（8,15），用于对用于选择所述存储器元件的第一组地址信号（7,14）进行解码;以及第二电路装置（4） 用于内部生成用于所述地址信号（3,11）的一系列值的存储。 第二电路装置（4）产生所述序列，使得序列中的连续值对于仅一个所述地址信号（3,11）的逻辑状态不同。

公开(公告)号：EP0661814B1

公开(公告)日：1999-03-31

申请号：EP93830526.5

申请日：1993-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： Olivo, Marco ,  Maccarrone, Marco

IPC: H03K21/38 ,  H03K19/21 ,  G11C16/06

CPC classification number: H03K21/38