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    High voltage regulator and corresponding voltage regulation method
    5.
    发明公开
    High voltage regulator and corresponding voltage regulation method 失效
    Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren

    公开(公告)号：EP0915408A1

    公开(公告)日：1999-05-12

    申请号：EP97830575.3

    申请日：1997-11-05

    Applicant: STMicroelectronics S.r.l.

    Inventor： Ghilardelli, Andrea ,  Brani, Francesco Maria ,  Golla, Carla

    IPC: G05F1/00 ,  G05F1/46

    CPC classification number: G05F1/465 ,  G05F3/247

    Abstract: This invention relates to a high voltage regulator partly supplied by a boosted voltage (PUMPOUT) and adapted to deliver a regulated output voltage (Vout) on an output terminal (OUT), starting from a sampled voltage (Vsample) obtained by dividing the regulated output voltage (Vout), which regulator comprises at least a comparator element (2) being supplied a supply voltage (Vdd) and feedback connected to a divider (4) of the regulated output voltage (Vout), the divider (4) being a diode type of divider connected between the output terminal (OUT) and a first comparison voltage reference (GND, Vref_v) and having a central connection node (Y, Z) connected to a non-inverting terminal of the comparator element (2).
    The invention also relates to a method of regulating a voltage (Vout) derived from a boosted voltage (PUMPOUT), comprising the steps of:

    obtaining a sampled voltage (Vsample) as the voltage value at a central connection node (Y, Z) of a diode type of divider (4) connected to a reference of the voltage to be regulated (Vout) and connected to a first comparison voltage reference (GND, Vref_v);
    regulating this voltage (Vout) according to the comparison of said sampled voltage (Vsample) with a second comparison voltage reference (Vref_v, GND).

    Abstract translation: 本发明涉及由升压电压（PUMPOUT）部分提供并适于在输出端（OUT）上输出调节输出电压（Vout）的高电压调节器，从通过将调节输出 电压（Vout），所述调节器至少包括比较器元件（2），所述比较器元件（2）被供应电源电压（Vdd），并且反馈连接到所述调节输出电压（Vout）的分压器（4），所述分压器（4）是二极管 连接在输出端（OUT）和第一比较电压基准（GND，Vref_v）之间​​并具有连接到比较器元件（2）的非反相端的中心连接节点（Y，Z）的分压器类型。 本发明还涉及一种调节从升压电压（PUMPOUT）导出的电压（Vout）的方法，包括以下步骤：获得采样电压（Vsample）作为中心连接节点（Y，Z）处的电压值 连接到待调节电压（Vout）的参考并连接到第一比较电压基准（GND，Vref_v）的二极管类型的分压器（4）; 根据所述采样电压（Vsample）与第二比较电压基准（Vref_v，GND）的比较来调节该电压（Vout）。

    Memory device having improved yield and reliability
    10.
    发明授权
    Memory device having improved yield and reliability 失效
    具有改进的可靠性和改进的结果存储装置

    公开(公告)号：EP0766174B1

    公开(公告)日：2002-05-22

    申请号：EP95830408.1

    申请日：1995-09-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Branchetti, Maurizio ,  Golla, Carla ,  Campardo, Giovanni

    IPC: G06F11/10

    CPC classification number: G06F11/1008

    Abstract: The present invention relates to a memory device of the type comprising: at least one first (M1) and one second (M2) memory cell array for storage respectively of a first plurality of user data and a second plurality of error identification and correction data, first (D1) and second (D2) decoding means connected respectively to the first (M1) and second (M2) memory cell array for selection and reading respectively of the first and second pluralities of data, error identification means (L1) coupled to said first (D1) and second (D2) decoder means, and error correction means (C1,C2,EN) operationally connected to said first (D1) and second (D2) decoder means and to said error identification means (L1), and characterized in that it comprises at least one logical control unit (L2) operationally connected to the second decoder means (D2), to error identification means (L1) and to the error correction means (C1,C2,EN) to enable said second decoder means (D2) and said error correction means (C1,C2,EN) if an error is detected by the error identification means (L1).

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