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    Class-D audio amplifier
    21.
    发明公开
    Class-D audio amplifier 审中-公开
    Klasse-DAudioverstärker

    公开(公告)号：EP1788701A1

    公开(公告)日：2007-05-23

    申请号：EP05425811.6

    申请日：2005-11-17

    Applicant: STMicroelectronics S.r.l.

    Inventor： Guanziroli, Federico ,  Nicollini, Germano ,  Confalonieri, Pierangelo

    IPC: H03F3/217

    CPC classification number: H03F3/217 ,  H03F3/2173 ,  H03F2200/78

    Abstract: An open-loop class-D amplifier (300) comprises a generation device (307) of a triangular wave signal (v tri (t)) having a differential output. Furthermore, the amplifier comprises at least one comparing circuit (302) provided with first differential input terminals (S+,S-) in order to receive a first signal (v in (t)) and second differential input terminals (T+,T-) in order to receive the triangular signal.
    In addition, the amplifier comprises a power stage (300') in order to give an output signal (v out (t)) to a load (306) and a terminal connectable to a power supply potential (V A ).
    The amplifier is characterized in that the generation device is such that the triangular signal has a peak value (V tri ) which is substantially proportional to said power supply potential (V A ) and a frequency (f fri ) which is fixed to a reference frequency value (f ck ), for the power supply potential changes.

    Abstract translation: 开环D类放大器（300）包括具有差分输出的三角波信号（v tri（t））的生成装置（307）。 此外，放大器包括至少一个比较电路（302），用于接收第一信号（v in（t））和第二差分输入端子（T +，T）中的第一差分输入端子（S +，S-） 以便接收三角形信号。 此外，放大器包括功率级（300'），以便给出负载（306）的输出信号（v out（t））和可连接到电源电位（V A）的端子。 所述放大器的特征在于，所述发生装置使得所述三角形信号具有与所述电源电位（VA）基本成比例的峰值（V tri）和固定为参考频率值的频率（fb1） （f ck），供电电位变化。

    Double sampled switched capacitor low pass multirate filter of a sigma delta D/A converter
    26.
    发明公开
    Double sampled switched capacitor low pass multirate filter of a sigma delta D/A converter 失效
    具有多个传输速率的带开关的电容器和双信号采样为Σ-Δ数/模转换器的低通滤波器

    公开(公告)号：EP0903862A1

    公开(公告)日：1999-03-24

    申请号：EP97830458.2

    申请日：1997-09-19

    Applicant: STMicroelectronics S.r.l.

    Inventor： Nagari, Angelo ,  Nicollini, Germano

    IPC: H03M3/00 ,  H03H19/00

    CPC classification number: H03H19/004 ,  H03M3/342 ,  H03M3/502

    Abstract: A ΣΔ digital/analog converter has a signal reconstructing multirate low pass filter realized as a switched capacitor fully differential, double sample structure wherein the input stage of the filter employs only two sampling capacitors, switched alternately on the two inputs of the stage and further includes two delay circuits (z -1 ) in the feed line of the bitstream towards one of the two inputs of the multistage SC filter. The zeroes so introduced in the transfer function reduce the noise energy in the vicinity of frequencies f s /2 n , preserving the SNR even with a relatively large mismatch between the capacitors.

    Abstract translation: Σ-Δ数/模转换器具有重构实现为开关电容器全差分，双样本结构worin滤波器的输入级仅采用两个采样电容器的多速率的低通滤波器的信号，交替地切换在舞台上和另外的两个输入端 包括在比特流中的朝向的多级SC滤波器的两个输入之一的进料管线两个延迟电路（Z <-1>）。 在传递函数中，以便介绍了零减少在频率fs / 2的的附近的噪声能量，保留SNR甚至与电容器之间的相对大的失配。

    Double sampled sigma delta modulator of second order having a semi-bilinear architecture
    27.
    发明公开
    Double sampled sigma delta modulator of second order having a semi-bilinear architecture 失效
    Sigma Delta调制器zweiter Ordnung mit doppelter Abtastung und semi-bilinearer Architektur

    公开(公告)号：EP0901233A1

    公开(公告)日：1999-03-10

    申请号：EP97830440.0

    申请日：1997-09-05

    Applicant: STMicroelectronics S.r.l.

    Inventor： Nagari, Angelo ,  Nicollini, Germano

    IPC: H03M3/00 ,  H03M3/02

    CPC classification number: H03M3/342 ,  H03M3/43 ,  H03M3/438

    Abstract: A second-order double-sampled analog/digital ΣΔ converter uses two fully differential switched-capacitors integrators coupled in cascade; the first integrator has a fully-floating double-sampled, bilinear switched capacitor input structure, whereas the second integrator has a double-sampled linear switched-capacitor input structure, achieving an excellent SNR with a reduced number of switches for a low consumption.

    Abstract translation: 二阶双采样模拟/数字SIGMA DELTA转换器使用两个串联耦合的全差分开关电容积分器; 第一个积分器具有全浮动双采样双线性开关电容器输入结构，而第二个积分器具有双采样线性开关电容输入结构，实现了低功耗数量少的开关的极好的SNR。

    Amplifier device and system using the device
    28.
    发明公开
    Amplifier device and system using the device 审中-公开
    Verstärkervorrichtungund System，das die Vorrichtung einsetzt

    公开(公告)号：EP2088671A2

    公开(公告)日：2009-08-12

    申请号：EP09152115.3

    申请日：2009-02-05

    Applicant: STMicroelectronics S.r.l.

    Inventor： Guanziroli, Federico ,  Nicollini, Germano

    IPC: H03F3/217

    CPC classification number: H03F3/217

    Abstract: The invention relates to a device (100) comprising: an input for an electric signal (v e (t)); an integrator stage (101) connected to said input to provide an integrated signal (v int (t)); an amplifier stage (300) electrically coupled to the integrator stage (101) to receive said integrated signal (v int (t)) and to provide an output signal (v ott (t)). The device being characterized in that the integrator stage (101) is such that the integrated signal is obtained by an individual signal integration operation.

    Abstract translation: 本发明涉及一种装置（100），包括：用于电信号的输入（v e（t））; 连接到所述输入的积分器级（101）以提供积分信号（v int（t））; 电耦合到积分器级（101）以接收所述积分信号（v int（t））并提供输出信号（v ott（t））的放大器级（300）。 该装置的特征在于，积分器级（101）使得通过单独的信号积分操作获得积分信号。

    Triangular wave generator
    29.
    发明公开
    Triangular wave generator 审中-公开
    Dreieckwellengenerator

    公开(公告)号：EP1788704A1

    公开(公告)日：2007-05-23

    申请号：EP05425812.4

    申请日：2005-11-17

    Applicant: STMicroelectronics S.r.l.

    Inventor： Guanziroli, Federico ,  Nicollini, Germano ,  Confalonieri, Pierangelo

    IPC: H03K4/06

    CPC classification number: H03K4/066

    Abstract: A generating device (100) of a triangular signal (v tri (t)) comprises an input device (101) provided with first terminals (102, 103) in order to receive a first (V A ) and second (GND) potentials and with differential output terminals (104, 105) in order to send an intermediate signal (i int (t)) to an integration device (501).
    This integration device comprises differential input terminals (IN1, IN2) connected to the output terminals of the input device and first output terminals (OUT1, OUT2) in order to provide the triangular signal (V tri (t)).
    The generating device is characterized in that the input device comprises switching means (T 1 , T 2 , T 3 , T 4 ) which can be activated/deactivated by means of external selection signals (S 1 , S 2 ) in order to connect the input terminals (IN1, IN2) to the first terminals of the input device according to alternative configurations. Furthermore, these external selection signals are generated in response to a timing signal (CK) having a substantially constant frequency (f ck ).

    Abstract translation: 三角形信号（v tri（t））的发生装置（100）包括设置有第一端子（102,103）的输入装置（101），以便接收第一（VA）和第二（GND）电位并且与 差分输出端子（104,105），以便向集成装置（501）发送中间信号（int int（t））。 该积分装置包括连接到输入装置的输出端的差分输入端（IN1，IN2）和第一输出端（OUT1，OUT2），以提供三角形信号（V tri（t））。 该生成装置的特征在于，该输入装置包括可通过外部选择信号（S1，S2）激活/去激活的切换装置（T 1，T 2，T 3，T 4），以便连接 输入端子（IN1，IN2）根据其他配置连接到输入设备的第一个端子。 此外，这些外部选择信号是响应于具有基本恒定频率（f ck）的定时信号（CK）产生的。

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