公开(公告)号：EP0913832A1

公开(公告)日：1999-05-06

申请号：EP97830566.2

申请日：1997-11-03

Applicant: STMicroelectronics S.r.l.

Inventor： Pasotti, Marco ,  Rolandi, Pier Luigi ,  Canegallo, Roberto ,  Gerna, Danilo ,  Chioffi, Ernestina

IPC: G11C11/56 ,  G11C27/00

CPC classification number: G11C11/5621 ,  G11C11/5628

Abstract: The programming method comprises the steps of: a) determining (140) a current value (V eff ) of the threshold voltage (V th ); b) acquiring (100) a target value (V p ) of the threshold voltage; c) calculating (150) a first number of gate voltage pulses necessary to take the threshold voltage from the current value to the target value; d) applying (160) a second number (N2) of consecutive voltage pulses to the gate terminal of the cell, said second number being correlated to the first number and having a uniformly increasing amplitude; e) then measuring (170) a current value (V eff ) of the threshold voltage; and repeating steps c) to e) until a final threshold value is obtained.

Abstract translation: 编程方法包括以下步骤：a）确定（140）阈值电压（Vth）的当前值（Veff）; b）获取（100）阈值电压的目标值（Vp）; c）计算（150）将阈值电压从当前值到目标值所需的第一数量的栅极电压脉冲; d）将连续电压脉冲的第二数量（N 2）施加到所述单元的所述栅极端子，所述第二数量与所述第一数量相关并具有均匀增加的幅度; e）然后测量（170）阈值电压的电流值（Veff）; 并重复步骤c）至e），直到获得最终阈值。

公开(公告)号：EP0905712A1

公开(公告)日：1999-03-31

申请号：EP97830477.2

申请日：1997-09-29

Applicant: STMicroelectronics S.r.l.

Inventor： Pasotti, Marco ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Gerna, Danilo ,  Rolandi, Pier Luigi

IPC: G11C27/00

CPC classification number: G11C27/005

Abstract: Device for analog programming comprising a current mirror circuit (19) connected to the drain terminals of a cell to be programmed (2) and of a MOS reference transistor (27); an operational amplifier (31) having inputs connected to the drain terminals (13) of the cell (2) and respectively of the MOS transistor (27) and output connected to the control terminal (30) of the MOS transistor. During programming, the control and drain terminals of the cell (2) are biased at corresponding programming voltages and the output voltage of the operational amplifier (31), which is correlated to the current threshold voltage level of the cell (2), is monitored and the programming is interrupted when this output voltage becomes at least equal to a reference voltage correlated to the threshold value desired for the cell.

Abstract translation: 要被编程装置模拟编程包括连接到电池的漏极端的电流镜电路（19），（2）和一个MOS晶体管参考（27）的; 运算放大器（31）具有输入端连接到所述单元（2）和分别与MOS晶体管（27）和输出连接至所述MOS晶体管的控制端子（30）的漏极端子（13）。 在编程期间，所述细胞（2）的控制极和漏极端在相应的编程电压和运算放大器（31）的输出电压偏置，所有这一切都被关联到该单元的电流阈值电压电平（2）被监控 和编程中断当该输出电压变成至少等于相关期望该小区的阈值的参考电压。

公开(公告)号：EP0833267B1

公开(公告)日：2004-02-25

申请号：EP96830492.3

申请日：1996-09-30

Applicant: STMicroelectronics S.r.l.

Inventor： Kramer, Alan ,  Canegallo, Roberto ,  Rolandi, Pier Luigi ,  Chinosi, Mauro ,  Gozzini, Giovanni ,  Sabatini, Marco

IPC: G06G7/60 ,  G06G7/26

CPC classification number: G11C16/0441 ,  G06G7/26 ,  G06N3/0635

公开(公告)号：EP0913832B1

公开(公告)日：2003-07-23

申请号：EP97830566.2

申请日：1997-11-03

Applicant: STMicroelectronics S.r.l.

Inventor： Pasotti, Marco ,  Rolandi, Pier Luigi ,  Canegallo, Roberto ,  Gerna, Danilo ,  Chioffi, Ernestina

IPC: G11C11/56 ,  G11C27/00

CPC classification number: G11C11/5621 ,  G11C11/5628

公开(公告)号：EP0872850B1

公开(公告)日：2003-07-02

申请号：EP97830172.9

申请日：1997-04-14

Applicant: STMicroelectronics S.r.l.

Inventor： Gerna, Danilo ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Pasotti, Marco ,  Rolandi, Pier Luigi

IPC: G11C27/00 ,  G11C16/06

CPC classification number: G11C16/28 ,  G11C27/005

公开(公告)号：EP1139210A1

公开(公告)日：2001-10-04

申请号：EP00830228.3

申请日：2000-03-28

Applicant: STMicroelectronics S.r.l.

Inventor： Rocchi, Alessandro ,  Bisio, Marco ,  Pasotti, Marco ,  Rolandi, Pier Luigi

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7203 ,  G06F2212/7211

Abstract: An architecture of a FLASH memory organized in a plurality of physical sectors wherein read, write and erase operations of data occupying a fractional memory space of any one of said physical sectors are carried out, may include splitting a physical sector in a plurality of singularly addressable logic sectors. Each logic sector (j) is defined by a memory space of pre-established size (PAYLOAD j ), a chain pointer (CHAIN_PTR j ) assuming a neutral value (NULL) or a value pointing directly or indirectly to a second logic sector associated to a respective chain pointer (CHAIN_PTR 2 ) at neutral value (NULL), a status indicator (STATUS j ) assuming a first value (FREE) if the logic sector is empty, a second value (OD) if the data contained in it belongs to the logic sector, a third value (NOD) if the data do not belong to the logic sector, or a fourth value (DEL) if the data has been erased, and a remap pointer (REMAP_PTR j ) assuming the neutral value (NULL) or a value pointing directly or indirectly to the chain pointer (CHAIN_PTR 3 ) of a third logic sector.
A further improvement consists in attributing to each physical sector a logical address (LOGICAL_ADDRESS) permitting to destine to the function of temporary buffer, for partly erasing the content of a physical sector, in rotation all the physical sectors, not to repeatedly stressing the same sector.

Abstract translation: 组织在多个物理扇区中的FLASH存储器的架构，其中执行占用任何一个所述物理扇区的分数存储器空间的数据的读，写和擦除操作，包括分割多个可单独寻址的物理扇区 逻辑部门。 每个逻辑扇区（j）由预先确定的大小（PAYLOADj）的存储器空间，假定中性值（NULL）的链指针（CHAIN_PTRj）或直接或间接指向与相应的第二逻辑扇区 链路指针（CHAIN_PTR2）为中性值（NULL），如果逻辑扇区为空则假定为第一值（FREE）的状态指示符（STATUSj），如果其中包含的数据属于逻辑扇区，则为第二值（OD） 如果数据不属于逻辑扇区，则为第三值（NOD），如果数据已经被擦除则为第四值（DEL），以及假设中性值（NULL）或直接指向的值的重映射指针（REMAP_PTRj） 或间接地连接到第三逻辑扇区的链指针（CHAIN_PTR3）。 进一步的改进在于将归属于每个物理扇区的逻辑地址（LOGICAL_ADDRESS）允许指定临时缓冲区的功能，以部分地擦除物理扇区的内容，旋转所有物理扇区，而不是反复强调同一扇区 。

公开(公告)号：EP0987715A1

公开(公告)日：2000-03-22

申请号：EP98830536.3

申请日：1998-09-15

Applicant: STMicroelectronics S.r.l.

Inventor： Pasotti, Marco ,  Lhermet, Frank ,  Rolandi, Pier Luigi

IPC: G11C11/56 ,  G11C16/06

CPC classification number: G11C16/3431 ,  G11C11/5621 ,  G11C16/3418

Abstract: The method includes restoring the charge lost from memory cells, such as to restore the original voltage levels, within a time equivalent to the retention time. The decision concerning when the memory is to be restored is taken for example when the memory is switched on, based on the time elapsed since the previous programming/restoration, or based on the difference between the present threshold voltage of the reference cells and the original threshold voltage of the (suitably stored) reference cells, or when predetermined operating conditions occur. This makes it possible to prolong the life of nonvolatile memories, in particular of multilevel type, wherein the retention time decreases as the number of levels (bits/cell) is increased.

Abstract translation: 该方法包括在等同于保留时间的时间内恢复从存储器单元丢失的电荷，例如恢复原始电压电平。 基于从上一次编程/恢复之后经过的时间，或者基于参考单元的当前阈值电压与原始值之间的差异，例如当存储器被接通时，采用关于何时恢复存储器的决定 （适当存储的）参考单元的阈值电压，或者当发生预定操作条件时。 这使得可以延长非易失性存储器的使用寿命，特别是延长多级电路的寿命，其中保持时间随着电平数（位/电池）的增加而减少。

公开(公告)号：EP0872850A1

公开(公告)日：1998-10-21

申请号：EP97830172.9

申请日：1997-04-14

Applicant: STMicroelectronics S.r.l.

Inventor： Gerna, Danilo ,  Canegallo, Roberto ,  Chioffi, Ernestina ,  Pasotti, Marco ,  Rolandi, Pier Luigi

IPC: G11C27/00 ,  G11C16/06

CPC classification number: G11C16/28 ,  G11C27/005

Abstract: An analog reading circuit (10) comprising a current mirror circuit (19) forcing two identical currents into a cell (2) to be read and into a reference cell (27) and an operational amplifier (31) having an inverting input connected to the drain terminal (13) of the cell (2) to be read, a non-inverting input connected to the drain terminal (28) of the reference cell (27) and an output connected to the gate terminal (30) of the reference cell. The reference cell (27) therefore forms part of a negative feedback loop which maintains the overdrive voltages of the cell (2) to be read and the reference cell (27) constant, irrespective of temperature variations. The reading circuit (10) is also of high precision and has a high reading speed.

Abstract translation: 一种模拟读取电路（10），包括电流镜电路（19），将两个相同的电流强制进入待读取的单元（2）并进入参考单元（27）;以及运算放大器（31），其具有与 要读取的单元（2）的漏极端子（13），连接到参考单元（27）的漏极端子（28）的非反相输入端和连接到参考单元（20）的栅极端子（30）的输出端 。 因此，参考单元（27）形成负反馈回路的一部分，其保持要读取的单元（2）的过驱动电压和参考单元（27）恒定，而与温度变化无关。 读取电路（10）也具有高精度且读取速度高的特点。