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公开(公告)号:US20220344248A1
公开(公告)日:2022-10-27
申请号:US17235944
申请日:2021-04-21
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Cheng-Ta Ko , Pu-Ju Lin , Kai-Ming Yang , Chi-Hai Kuo , Chia-Yu Peng , Tzyy-Jang Tseng
IPC: H01L23/498 , H01L25/065 , H01L23/538 , H01L23/00 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.
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公开(公告)号:US11424216B2
公开(公告)日:2022-08-23
申请号:US17030380
申请日:2020-09-24
Applicant: Unimicron Technology Corp.
Inventor: Chia-Fu Hsu , Kai-Ming Yang , Pu-Ju Lin , Cheng-Ta Ko
Abstract: A fabrication method of an electronic device bonding structure includes the following steps. A first electronic component including a first conductive bonding portion is provided. A second electronic component including a second conductive bonding portion is provided. A first organic polymer layer is formed on the first conductive bonding portion. A second organic polymer layer is formed on the second conductive bonding portion. Bonding is performed on the first electronic component and the second electronic component through the first conductive bonding portion and the second conductive bonding portion, such that the first electronic component and the second electronic component are electrically connected. The first organic polymer layer and the second organic polymer layer diffuse into the first conductive bonding portion and the second conductive bonding portion after the bonding. An electronic device bonding structure is also provided.
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公开(公告)号:US11410933B2
公开(公告)日:2022-08-09
申请号:US17314055
申请日:2021-05-07
Applicant: Unimicron Technology Corp.
Inventor: John Hon-Shing Lau , Cheng-Ta Ko , Pu-Ju Lin , Tzyy-Jang Tseng , Ra-Min Tain , Kai-Ming Yang
IPC: H01L21/00 , H01L23/538 , H01L25/065 , H01L23/00 , H01L21/48 , H01L25/00
Abstract: A package structure, including a bridge, an interposer, a first redistribution structure layer, a second redistribution structure layer, and multiple chips, is provided. The bridge includes a silicon substrate, a redistribution layer, and multiple bridge pads. The interposer includes an intermediate layer, multiple conductive vias, multiple first pads, and multiple second pads. The bridge is embedded in the intermediate layer. The bridge pads are aligned with the upper surface. The first redistribution structure layer is disposed on the upper surface of the interposer and is electrically connected to the first pads and the bridge pads. The second redistribution structure layer is disposed on the lower surface of the interposer and is electrically connected to the second pads. The chips are disposed on the first redistribution structure layer and are electrically connected to the first redistribution structure layer. The chips are electrically connected to each other through the bridge.
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公开(公告)号:US20220130781A1
公开(公告)日:2022-04-28
申请号:US17567883
申请日:2022-01-04
Applicant: Unimicron Technology Corp.
Inventor: Tzyy-Jang Tseng , Pu-Ju Lin , Cheng-Ta Ko , John Hon-Shing Lau
IPC: H01L23/00 , H01L23/538 , H01L25/00 , H01L21/48
Abstract: A circuit substrate structure includes a circuit substrate, at least two chips, and a bridge element. The circuit substrate has a first surface and a second surface opposite to each other. The chips are arranged in parallel on the first surface of the circuit substrate and electrically connected to the circuit substrate. The chips have active surfaces, back surfaces opposite to the active surfaces, and side surfaces connecting the active surfaces and the back surfaces. The chips include side circuits. The side circuits are arranged on the side surfaces and have first ends and second ends, the first ends extend to the active surfaces along the side surfaces, and the second ends extend to the back surfaces along the side surfaces. The bridge element is arranged on the back surfaces of the chips and electrically connected to the active surfaces of the chips through the side circuits.
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公开(公告)号:US20200043839A1
公开(公告)日:2020-02-06
申请号:US16167540
申请日:2018-10-23
Applicant: Unimicron Technology Corp.
Inventor: Cheng-Ta Ko , Kai-Ming Yang , Yu-Hua Chen , Tzyy-Jang Tseng
IPC: H01L23/498
Abstract: A package substrate structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The vias and the pads are disposed on the first substrate, and fills in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar is disposed between the first substrate and the second substrate, where each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package substrate structure is also provided.
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公开(公告)号:US20190250502A1
公开(公告)日:2019-08-15
申请号:US16395244
申请日:2019-04-26
Applicant: Unimicron Technology Corp.
Inventor: Pu-Ju Lin , Shih-Lian Cheng , Yu-Hua Chen , Cheng-Ta Ko , Jui-Jung Chien , Wei-Tse Ho
IPC: G03F1/50 , G03F7/20 , H05K3/42 , H05K3/18 , H05K3/12 , H05K3/10 , H05K3/00 , G01K15/00 , G01K7/24 , H05K3/24 , H05K3/06
CPC classification number: G03F1/50 , G01K7/24 , G01K15/007 , G03F7/2032 , G03F7/2047 , H05K3/0023 , H05K3/064 , H05K3/107 , H05K3/1275 , H05K3/182 , H05K3/241 , H05K3/422 , Y10T29/49124
Abstract: A mask structure and a manufacturing method of the mask structure are provided. The mask structure includes a transparent substrate, a patterned metal layer, and a plurality of microlens structures. The patterned metal layer is disposed on the transparent substrate and exposing a portion of the transparent substrate. The microlens structures are disposed on the transparent substrate exposed by a portion of the patterned metal layer and being in contact with the portion of the patterned metal layer.
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27.
公开(公告)号:US10324370B2
公开(公告)日:2019-06-18
申请号:US15256757
申请日:2016-09-06
Applicant: Unimicron Technology Corp.
Inventor: Pu-Ju Lin , Shih-Lian Cheng , Yu-Hua Chen , Cheng-Ta Ko , Jui-Jung Chien , Wei-Tse Ho
IPC: H05K3/00 , G03F1/50 , H05K3/06 , H05K3/24 , G01K7/24 , G01K15/00 , H05K3/10 , H05K3/12 , H05K3/18 , H05K3/42 , G03F7/20
Abstract: A manufacturing method of a circuit substrate is provided. A substrate is provided. A positive photoresist layer is coated on the substrate. Once exposure process is performed on the positive photoresist layer disposed on the substrate so as to simultaneously form concaves with at least two different depths.
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公开(公告)号:US10083901B2
公开(公告)日:2018-09-25
申请号:US15853926
申请日:2017-12-25
Applicant: Unimicron Technology Corp.
Inventor: Yu-Hua Chen , Cheng-Ta Ko
IPC: H05K3/46 , H01L23/498 , H01L21/48 , H01L23/00
CPC classification number: H01L23/49822 , H01L21/4853 , H01L21/4857 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/562 , H05K3/4682 , H05K3/4688 , H05K2201/096 , H05K2201/10378
Abstract: A method for manufacturing a circuit redistribution structure includes the following steps. A first dielectric is formed on a carrier. Conductive blind vias are formed in the first dielectric. A first circuit redistribution layer is formed on the first dielectric. A second dielectric is formed on the first dielectric. First and second holes are formed on the second dielectric. A trench is formed in the second dielectric to divide the second dielectric into first and second portions. A first portion of the first circuit redistribution layer and the first hole are disposed in the first portion of the second dielectric, and a second portion of the first circuit redistribution layer and the second hole are disposed in the second portion of the second dielectric. Conductive blind vias are formed in the first and second holes, and a second circuit redistribution layer is formed on the second dielectric.
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公开(公告)号:US20250149426A1
公开(公告)日:2025-05-08
申请号:US18895309
申请日:2024-09-24
Applicant: Unimicron Technology Corp.
Inventor: An-Sheng Lee , Chen-Hao Lin , Kai-Ming Yang , Pu-Ju Lin , Cheng-Ta Ko , Chin-Sheng Wang , Tzyy-Jang Tseng
IPC: H01L23/498 , H01L23/00 , H01L25/00 , H01L25/16
Abstract: A package structure includes a package substrate, an organic interposer and an electronic unit. The package substrate includes a plurality of first pads. The organic interposer is disposed on the package substrate and includes a plurality of second pads. The second pads are directly connected to the first pads to electrically connected the organic interposer to the package substrate. At least one of each of the first pads and each of the second pads includes a pad portion and a plurality of contact portions connecting the pad portion. A first extension direction of the pad portion is different from a second extension direction of the contact portions. The electronic unit is disposed on the organic interposer, wherein the electronic unit is electrically connected to the package substrate through the organic interposer.
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公开(公告)号:US20240237202A9
公开(公告)日:2024-07-11
申请号:US17992933
申请日:2022-11-23
Applicant: Unimicron Technology Corp.
Inventor: Kai-Ming Yang , Chia-Yu Peng , Cheng-Ta Ko , Pu-Ju Lin
CPC classification number: H05K1/0298 , H05K1/11 , H05K3/4644 , H05K2203/041
Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.
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